Xilinx CPLDs Low Cost Solutions At All Voltages. 0.35u CPLD Product Portfolio Complete Solutions for all Markets 0.18u 0.25u XC9500XL 3.3V 5.0 ns t PD.

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Presentation transcript:

Xilinx CPLDs Low Cost Solutions At All Voltages

0.35u CPLD Product Portfolio Complete Solutions for all Markets 0.18u 0.25u XC9500XL 3.3V 5.0 ns t PD 288 mcells CoolRunner-II 1.8V 3.0 ns t PD 512 mcells XC9500XV 2.5V 5.0 ns t PD 288 mcells XPLA3 3.3V 5.0 ns t PD 512 mcells Lowest Cost 3.3V Lowest Cost 1.8V XC V 5.0 ns t PD 288 mcells 0.50u Lowest Power Low Power

Xilinx CPLD Feature Comparison FeatureCoolRunner-II CoolRunner XPLA3 9500XL / XV Core Voltage / 2.5 Low PowerRealDigital + DataGATELow power mode Global Clock343 P-Term Inputs40 54 Clock Management Divide, DualEDGE & CoolCLOCK None I/O Standards LVTTL, LVCMOS, HSTL, SSTL LVTTL, LVCMOS I/O Banks1 to 411 to 4 (XV), 1 (XL) Macrocells T PD / F MAX 3.5 / 3335 / / 250 SecurityMultiple levels1 level Process Technology0.18u0.35u0.35u / 0.25u RealDigital

The RealDigital CPLD A New Class of CPLD: High Performance & Ultra Low Power

The RealDigital CPLD Advantage

CoolRunner-II Family Overview

CoolRunner-II Flexibility XC2C32XC2C64XC2C128XC2C256XC2C384XC2C512 I/O Banks LVTTL33, LVCMOS 33, 25, 18, 15* SSTL3-1(3.3v), SSTL2-1 (2.5v), HSTL1 (1.5v) Input hysteresis control Slew rate control CoolCLOCK DataGATE DualEDGE Clock divider Bus hold output Hot pluggable                                              Note: 1.5v inputs need hysteresis Programmable Grounds     

Design Kit A complete design kit for: A complete design kit for: Logic designers new to CPLDs Logic designers new to CPLDs CPLD designers new to Xilinx CPLD designers new to Xilinx ASIC designers ASIC designers Simple, inexpensive demo board Simple, inexpensive demo board Battery or AC outlet power source Battery or AC outlet power source Parallel printer cable for programming Parallel printer cable for programming LED's for simple testing LED's for simple testing Dual in line I/O header for easy connections Dual in line I/O header for easy connections Jumpers for easy modifications Jumpers for easy modifications Multiple device selection on a single board (CoolRunner-II or XC9500XL) Multiple device selection on a single board (CoolRunner-II or XC9500XL) A complete design kit for: A complete design kit for: Logic designers new to CPLDs Logic designers new to CPLDs CPLD designers new to Xilinx CPLD designers new to Xilinx ASIC designers ASIC designers Simple, inexpensive demo board Simple, inexpensive demo board Battery or AC outlet power source Battery or AC outlet power source Parallel printer cable for programming Parallel printer cable for programming LED's for simple testing LED's for simple testing Dual in line I/O header for easy connections Dual in line I/O header for easy connections Jumpers for easy modifications Jumpers for easy modifications Multiple device selection on a single board (CoolRunner-II or XC9500XL) Multiple device selection on a single board (CoolRunner-II or XC9500XL)

Quick Start Training All materials now released! Full day of training at recent FAE conference World-wide roll out complete Set up your customer training now

Quick Start Modules Module 1 : CoolRunner-II Technology & Architecture Module 2 : CoolRunner-II Advanced Features - I Module 3 : CoolRunner-II Advanced Features – II Module 4 : CoolRunner-II In Cell Phone Security Module 5 : Cell Phone Handsets Module 6 : CoolRunner-II in PDAs Module 7 : DDR SDRAM Memory Interface Module 8 : PicoBlaze CPLD Microcontroller Module 9 : Powering CoolRunner-II CPLDs Module 10 : Compact Flash for CoolRunner-II CPLDs Module 11 : CoolRunner-II CPLDs in Security Module 12 : XPower for CoolRunner XPLA3 CPLDs Module 13 : XPower for CoolRunner-II CPLDs Module 14 : CoolRunner-II Low Cost Solutions Module 15 : Digital Camera Design Module 16 : Low Power Memory Module 17 : Smart Card Reader Module 18 : CryptoBlaze Get up to speed on CoolRunner-II features and new applications

Quick Start Modules at:

The CoolRunner XPLA3 CPLD Family Low Power and 3.3V Operation

Low power, high performance CPLD – 5V tolerant I/O – <100uA standby power – Full JTAG compliance – Industrial temp grade operates from 2.7V Ultra-small chip scale packaging – Perfect for portable applications Robust architecture delivers great ISP – Superior pin-locking WebPACK & ISE software support CoolRunner XPLA3 - The Lowest Power 3.3V CPLD Solution

The XC9500XL CPLD High Performance and 3.3V Operation

I/O Flexibility – XL: 5v tolerant; direct interface to 3.3v & 2.5v Input hysteresis on all pins for improved signal integrity Easy ATE integration for ISP & JTAG – Fast, concurrent programming times 36 to 288 macrocell densities Complete IEEE JTAG Space-efficient chip scale packaging XC9500XL Key Features

XC9500XL Family Macrocells Usable Gates t pd (ns) XC9500XL XC9536XL XC9572XL XC95144XL XC95288XL

Aggressive Cost Management Cost = Design + Product Cost + COS = Value IPT A SWPD Wafer Final Test Assembly Distribution SortProgramming Product Innovation Inventory Customer It’s More Than Just Process and Product Technology Innovation

The Complete CPLD Solution 1.8 volts to 5 volt operation Low power/high performance Low cost