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XC9000 Series In-System Programming (ISP) and Manufacturing Flows Frank Toth February 20, 2000 ®

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Presentation on theme: "XC9000 Series In-System Programming (ISP) and Manufacturing Flows Frank Toth February 20, 2000 ®"— Presentation transcript:

1 XC9000 Series In-System Programming (ISP) and Manufacturing Flows Frank Toth February 20, 2000 ®

2 ® www.xilinx.com  Flexible, efficient, pin-locking architecture  Industry standard JTAG/ISP  High endurance  High performance  PC & WS software XC9000 Series: Developed for a Better ISP Solution Process Technology Chip Architecture Software

3 ® www.xilinx.com  Easy prototyping: —Minimize fragile package handling —Develop - program - test - redesign - reprogram in an integrated software environment  System integration: —Advanced debugging tools via JTAG  Manufacturing: —Pre-production: allow last minute design changes —High volume: integrate device programming & board-level test  Field upgrades: —Allows for design upgrading/reconfiguration in the field PrototypingSystem Integration Field Upgrades Manufacturing Pre-production Manufacturing High Volume ISP Supports the Product Life Cycle

4 ® www.xilinx.com XILINX CPLDs Driving the ISP Evolution  Complete support of the ISP designer’s Product Life Cycle  Delivers new FLASH technology benefits to CPLDs  Provides industry’s best pin-locking CPLD at lowest price  Complete “state-of-the-art” software support  CPLDs key part of the Xilinx “total logic solution”

5 ® www.xilinx.com XC9000 Series Supports Multiple Programming Methods  ISP via PC/Workstation download cable —Prototype programming/debug —Functional test/programming in manufacturing  Hardware programmer —Data I/O, BP Micro, & others...  ATE —HP, GenRad, Teradyne, IFR  Microprocessor/Microcontroller download —C-Code embedded support

6 ® www.xilinx.com Benefits of ISP in Manufacturing  Maximize: —Profit —ROI for ATE time —Flexibility —Manufacturing efficiency  Minimize: —Risk —Overall manufacturing time —Board/part damage —Rework —Inventory management —Time-to-Market

7 ® www.xilinx.com Four Typical Manufacturing Flows  Assemble  PC Program ATE Test  Assemble ATE Program/ Test  Assemble ATE Test PC Program  Preprogram Assemble ATE Test

8 ® www.xilinx.com Flow 1 Assemble/PC Program/ATE Test Programming Considerations PC Cost Handling fallout Programming personnel Cable Floor space Fixture development Xilinx Solutions JTAG Programming Software Download Parallel/Serial Cables Win 95/NT support Concurrent (multiple simultaneous) Programming Assemble Blank Chips Program on PC Test on ATE & Burn-in Inventory & Ship

9 ® www.xilinx.com Flow 2 Assemble/ATE Program & Test Programming Considerations ATE memory More tester time Xilinx ATE Solutions HP 3070 Support GenRad GR228X Support Teradyne Spectrum & Z1800 IFR Series 4200 Uses Industry Standard SVF files Full JTAG Support Assemble Blank Chips Program & Test on ATE Burn-in Inventory & Ship

10 ® www.xilinx.com Flow 3 Assemble/ATE Test/PC Program Programming Considerations PC Cost Handling fallout Programming personnel Cable Floor space Fixture development Xilinx Solutions JTAG Programming Software Download Parallel/Serial Cables Win 95/NT support Concurrent Programming Assemble Blank Chips Test on ATE Program on PC Inventory & Ship Functional Test

11 ® www.xilinx.com Flow 4 Preprogram/Assemble/ATE Test Programming Considerations Programming cost Inventory cost Insertion handling fallout Programmer cost Xilinx Solutions 3rd Party Programmer Certification Xilinx HW130 Programmer Distribution Programming Center Certification Board Assembly of Programmed Chips Inventory & Ship Test on ATE

12 ® www.xilinx.com Robust JTAG Instruction Set Industry standard 4-pin IEEE 1149.1 JTAG Design, debug, chip test & programming through JTAG Basic JTAG support: EXTEST, SAMPLE/PRELOAD, BYPASS, CLAMP Industry-leading extended JTAG manufacturing support USERCODE: built-in version control capability IDCODE: identification of manufacturer, part number, silicon revision INTEST: drive/read internal logic HIGHZ: all outputs in high impedance mode, sophisticated interconnect test ISP CLAMP (XC9500XL): clamps outputs while programming

13 ® www.xilinx.com XC9000 Series Utilizes Industry Standard JTAG Chains XC9000 Series FPGA uP DSP ASIC XC9000 Series TDI TDO TMS TCK

14 ® www.xilinx.com Xilinx Supports All Flows Key Attribute Flow 1 2 3 4 Embedded Option Mfg Time X X X Fewer steps Inventory Savings XXX X Lower cost Yield Enhancement X Lower Handling Fallout Benefits/ Comments HW Cost Savings X X No need for PCs, cables, handlers Floor Space Savings XXLess equipment needed Process Adaptability XXXEasy upgrades during prototyping phase Outsource Programming XXConsistent with well known mature flow Use of Subcontractors More focus on core competency X XX X

15 ® www.xilinx.com Xilinx Provides Total ISP Manufacturing Solution  Many ways to program XC9000 Series in manufacturing  Xilinx provides support for all flows —resources, tools, alliances  XC9000 Series has most complete JTAG support  GOAL: Make customers successful in applying ISP to their manufacturing process

16 ® www.xilinx.com Xilinx Third Party Solutions Automatic Test Equipment JTAG Programming & Debug


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