Performed by: Kfir Toledo Tzofnat Grinberg Instructor: Ina Rivkin המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל Technion - Israel institute of technology department of Electrical Engineering דו ” ח סיכום פרויקט Subject: Project name סמסטר חורף

Abstract המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 2 In this project we developed and implemented testing environment for Detection of low intensity and short duration light pulses for SPAD chip (Ver 2).

System description המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 3 SPAD chip reacts to light pulse, count the amount of event (light pulse) that were detected. The data (“Frame”) transmitted from the SPAD chip to the ZedBoard-FPGA (Zynq-7000) for further processing. Main application: Live video- “Real Time live” video and recorded video from SPAD chip. Detection- implement algorithm for Low level Detection (Filtering Algorithm) of low intensity and short duration light pulses. After been process by the FPAG the data is transferred to the ARM processor using AXI bus, there a Fast communication line is establish between the Host and the Zedboard, base on TCP/IP protocol.

Specification המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory Hardware Software 4 ZedBoard- including Zynq SPAD chip, developed in the Technion. Vivado- hardware development environment. SDK- Software development environment. Matlab- used for HW-host communication.

System Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 5 ZedBoard

FPGA Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 6