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Performed by: Yarovoy Boris Dubossarsky Maxim Instructor: Michael Itzkovitz המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון.

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Presentation on theme: "Performed by: Yarovoy Boris Dubossarsky Maxim Instructor: Michael Itzkovitz המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון."— Presentation transcript:

1 Performed by: Yarovoy Boris Dubossarsky Maxim Instructor: Michael Itzkovitz המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל Technion - Israel institute of technology department of Electrical Engineering דו ” ח סיכום פרויקט Subject: Connecting video camera to PC via DSP סמסטר ( אביב ) תשס " ב 1

2 Abstract המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 2 This project is the basis for further projects with purpose to connect video cameras to users on PC’s. The challenge of project is to send video stream via McBSP channels and not by USB. Project consist of programs to TI’s DSP platform- TMS320C6701 Evaluation Module,and for PC. Evaluation module receives data from another TI platform IDK with video camera.IDK receives and processes data stream and sends it to EVM on two McBSP channels.EVM only transfers it to PCI bus using buffers to avoid conflicts between writes and reads of data. PC program uses help function (given by TI with driver for EVM) to transfer data from EVM to PC and stores it in file.Speed of internal logics of EVM and McBSP is sufficient for needs of system and do not disturb PCI bus operation.

3 Daughter card המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 3 2 McBSP Channels PCI bus TMS320C6701 Evaluation Module with PCI slot TMS320C6711 Imaging Developer’s Kit System description receives from camera and processes video data transmits input video data to PCI bus processes video stream to the screen

4 Specification המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory Hardware Software 4 TMS320C6701 Evaluation Module with two McBSP ports and 8MB SDRAM memory and connection to PCI slot - TI code composer in order to write and load the DSP programs - Visual Studio in order to write program for host side

5 System Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory EVM DMA Channel 1 Channel 0 SDRAM Buffer 0 64K*4 Buffer 1 64K*4 Buffer 2 64K*4 DMA Channel 2 FIFO 32bit*8 McBSP 0 32bit McBSP 1 32bit PCI bus 32 bit Buffer 64K*4 FILE PC Video stream


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