Project number: Andreas Sakellariou – PRISMA ELECTRONICS 1 st EU Mid-Term Review meeting 7 November 2014.

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Presentation transcript:

Project number: Andreas Sakellariou – PRISMA ELECTRONICS 1 st EU Mid-Term Review meeting 7 November 2014

Personal Information Dpl. In Electrical & Computer Engineering, Aristotle University of Thessaloniki I work for Prisma Electronics since 2009 as a hardware designer PCB design, RF design, circuit simulations 2 Secondments in University of Pisa: April-May 2013 and September- October /11/2013 2

AMBSLPv1 Brief description of the board: A slightly modified Eurocard, dimensions 400x366.7mm All data paths are differential serial link 2Gbit/s All clocks are differential LVDS There are only 2 big FPGAs (Artix pads) for data distribution Worked on physical layout until June 2013, it was completed by CERN team 19/09//2013EU review meeting 3 PCB layout at June, 2013

Changes in the final version The v2 of the board was realized between my first and second secondment period Replacement of the fanout buffers: Simpler design and layout, reduced consumption Faster configuration of the AMChips: The solution of Ethernet connection was examined but the design risk was high and a flash memory was chosen Capability to program the onboard FPGAs both from external connector and onboard stored firmware. Modifications on the power supply: Deletion of DC/DC converters that are no longer needed. This leads to better thermal/electrical behavior of the board 19/09//2013EU review meeting 4 AMBSLPv3

Work The current state of AMBSLPv3 layout 19/09//2013EU review meeting 5

Training In depth use of CADENCE design suit: My collaboration with PhD candidate Saverio Citraro gave me the opportunity to exploit powerful features of the design software: High speed design, Collaborative parallel work on the same design FTK Workshop & UNIPI training March 2013 Signed paper: “THE ASSOCIATIVE MEMORY SYSTEM FOR THE FTK PROCESSOR AT ATLAS” Workshop in Thessaloniki March 2014 organized by the Physics dpt. Of Aristotle University: Introduction to FPGAs and VHDL 3rd Workshop on Modern Circuits and Systems Technologies (MOCAST) 14 March 2014 Online training on HiPeac activities 2 Months of Italian language courses (September-October 2014) 20-21/11/2013 6

Conclusion So far my collaboration with UNIPI and specifically with the FTK team is excellent. I had the opportunity to work with highly skilled engineers on topics, like complex multilayer PCB design, Signal Integrity, and Power design The experience that I gained on CADENCE design suite is a valuable asset for my electronic design duties in PRISMA Last, but not least FTK is for me an excellent networking opportunity both in the academia and the industrial sector. 19/09//2013EU review meeting 7

Thank you! 19/09//2013EU review meeting 8