Towards the Design of Heterogeneous Real-Time Multicore System Adaptive Systems Laboratory, Master of Computer Science and Engineering in the Graduate School of the University of Aizu, Japan February 20, 20131MT2012 m Yumiko Kimezawa Supervised by Prof. Ben Abdallah Abderazek

Background (1/4) Electrocardiography (ECG) is a well known method for heart diagnosis -Used as one of major diagnosis for conventional health monitoring Main challenges of processing ECG arise from: -High computational demand for processing huge amount of data under:  Strict time constraints  Relatively high sampling frequency  Life critical conditions February 20, 2013MT20122

February 20, 2013MT20123 Most ECG systems use Pan-Tompkins approach based on QRS complex o Usage of R-peak as a reference point o Accurate detection of R-peak is a must  R-peak detection might be inaccurate Traditional techniques may fail in detecting serious heart problems Background (2/4)

February 20, 2013MT20124 Most ECG systems use Pan-Tompkins approach based on QRS complex o Usage of R-peak as a reference point o Accurate detection of R-peak is a must  R-peak detection might be inaccurate Traditional techniques may fail in detecting serious heart problems Background (2/4)

February 20, 2013MT20125 Most ECG systems use Pan-Tompkins approach based on QRS complex o Usage of R-peak as a reference point o Accurate detection of R-peak is a must  R-peak detection might be inaccurate Traditional techniques may fail in detecting serious heart problems Background (2/4)

6 Period detection Peaks detection Reading data Derivation Autocorrelation Find interval Extraction of max point Store results Discrimination Based on autocorrelation approach Background (3/4) : PPD Algorithm February 20, 2013MT2012

Background (4/4) : BANSMOM System February 20, 2013MT20127 System Architecture of BANSMOM System Stratix III Real-time monitoring interface Verification R y : Autocorrelation function y[n]: The filtered ECG signal L: Lags of the calculations to get the period PPD algorithm -Autocorrelation

Problems Requiring a large amount of hardware resources -Logic utilization shows a linear increase for each additional PPD modules PPD Algorithm runs on single processor  may miss Real-Time deadlines The need for connecting to database server in order to monitor data efficiently in real-time February 20, 2013MT20128

Research Goals 1.Software Optimization  Parallelize PPD algorithm to boost performance and meet real-time deadlines 2.Hardware Optimization  Optimize system hardware (Sharing, DMA and Ethernet cores) 3.System Integration ▪Integrate and evaluate the new optimized system with a Real-Time Monitoring Interface (being Developed by Achraf) February 20, 2013MT20129

Graphic LCD Controller Master CPU Memory Master CPU Timer Graphic LCD LED JTAG UART PPD Module Master Module LED Controller Avalon Bus FIR Filter Timer Slave CPU Memory Slave CPU Filtered Data Memory Shared Memory ECG Data Rom : Data flow : Control signal DMA Controller Ethernet Module Ethernet PHY TSE MAC TX SGDMA Descriptor Memory The Block Diagram of improved system February 20, MT2012

Graphic LCD Controller Master CPU Memory Master CPU Timer Graphic LCD LED JTAG UART PPD Module Master Module LED Controller Avalon Bus FIR Filter Timer Slave CPU Memory Slave CPU Filtered Data Memory Shared Memory ECG Data Rom : Data flow : Control signal DMA Controller Ethernet Module Ethernet PHY TSE MAC TX SGDMA Descriptor Memory The Block Diagram of improved system February 20, MT2012 Master module Controlling the whole systems such as reading date from shared memory, etc

Graphic LCD Controller Master CPU Memory Master CPU Timer Graphic LCD LED JTAG UART PPD Module Master Module LED Controller Avalon Bus FIR Filter Timer Slave CPU Memory Slave CPU Filtered Data Memory Shared Memory ECG Data Rom : Data flow : Control signal DMA Controller Ethernet Module Ethernet PHY TSE MAC TX SGDMA Descriptor Memory The Block Diagram of improved system February 20, MT2012 PPD module Detection of following information using PPD algorithm -Intervals and their position -Position and voltage of each peak (P, Q, R, S, T and U)

Graphic LCD Controller Master CPU Memory Master CPU Timer Graphic LCD LED JTAG UART PPD Module Master Module LED Controller Avalon Bus FIR Filter Timer Slave CPU Memory Slave CPU Filtered Data Memory Shared Memory ECG Data Rom : Data flow : Control signal DMA Controller Ethernet Module Ethernet PHY TSE MAC TX SGDMA Descriptor Memory The Block Diagram of improved system February 20, MT2012 Ethernet module Transfer of the results that have been processed by PPD module to another PC over the Ethernet

Evaluation methodology Language: Verilog HDL Tools: Quartus II, SOPC Builder, and NIOS II IDE Target device: Stratix III DSP Board (EP3SL150F1152C2) Target data: 10 sample data -From MIT-BIH Normal Sinus Rhythm Database Evaluation approach -Hardware complexity -Execution time February 20, MT2012

Hardware Complexity February 20, 2013MT System model Logic utilization Block memory bits Fmax (MHz) Power (mW) Combinational ALUTs Dedicated Logic registers Total 1-lead12,38815,33618%1,368,920(24%) lead20,24625,23131%1,971,992(35%) lead28,27035,15343%2,575,064(46%) lead36,24045,02455%3,178,584(56%) lead44,16154,27867%3,783,066(67%) lead52,06064,06679%4,386,330(78%)

Execution Time February 20, 2013MT The following table shows the average execution time 10 kinds of sample data is used to calculate that time Comparing the execution time of improved system including the feature of DMA transfer to execution time of previous system Architecture BANSMOM System 1-lead 2-lead 3-lead 4-lead

Conclusion I designed new BANSMOM system having the function of DMA feature and Ethernet module Optimizing software to boost performance and meet real-time deadlines (not yet) Processing time is decreased by (not yet) -XXX % in improved system February 20, 2013MT201217

Future Work Integrating and evaluating the new improved system with a Real-Time Monitoring Interface February 20, 2013MT201218

Thank you for listening February 20, 2013MT201219