® Introducing the Xilinx Spartan Series High Performance, Low Cost FPGAs with on-chip SelectRAM Memory

® Xilinx Spartan Series FPGAs Xilinx 4000 Heritage Total Cost Management Advanced Process Technology >80 MHz Performance On-chip SelectRAM Software and cores Smallest die size Low packaging cost Low test cost

® Xilinx Spartan Families  Complete High Volume FPGA Solution —Spartan: 5 Volt with up to 40K System Gates —Spartan-XL: 3.3 Volt with up to 40K System Gates —Xilinx Alliance and Foundation Software  Process technology leap  XC4000 heritage —Most successful FPGA architecture  No compromises —Performance, RAM, Cores & Low Price

® Advanced Process Core core-limited I/O pads Gate count determines die size Spartan Die Size for High I/O package Nearly Equivalent to Gate Arrays pad-limited Core I/O pads I/O count determines die size

® Chip Combines 3.3 V operation with 0.25  benefits Spartan-XL Family Advanced 0.35m Process  Transistor gates 0.35   Allows 3.3 V supply  All other features 0.25  —Small size —Low capacitance —Performance —Low power

® The industry’s BEST high volume FPGA solution!! Xilinx Spartan Series Benefits  Xilinx has changed the rules! —No more compromises —Gates-only solutions are no longer required  Spartan Series delivers key ASIC requirements with all the FPGA advantages —Performance —On-chip SelectRAM Memory —Cores —Low price

® 5 Volt ->XCS05XCS10XCS20XCS30XCS Volt ->XCS05XLXCS10XLXCS20XLXCS30XLXCS40XL System Gates 2K-5K3K-10K7K-20K10K-30K13K-40K Logic Cells Max Logic Gates 3,0005,00010,00013,00020,000 Flip-Flops Max RAM bits 3,2006,27212,80018,43225,088 Max Avail. I/O Performance 80MHz80MHz80MHz80MHz80MHz Xilinx Spartan Series Devices No Compromises: Performance, RAM, Cores, and Low Price

® XCS##XL -3PC84C XCS = Spartan XL = 3.3 Volt no XL = 5 Volt ## = System Gates Spartan Naming  Spartan part name uses “System Gates” —Includes both RAM and Logic –High end of current published gate range —Matches ASIC industry terminology —Consistent with future FPGA families

® 5 VoltXCS05XCS10XCS20XCS30XCS VoltXCS05XLXCS10XLXCS20XLXCS30XLXCS40XLPC84 VQ100VQ100VQ100VQ100 TQ144TQ144TQ144CS144 (XL) PQ208PQ208PQ208PQ240BG256CS280 (XL) Spartan Series Footprint Compatibility  Highest volume ASIC plastic packages  Footprint compatible in common packages

® Pinout Compatibility  Complete pinout compatibility within Spartan Series  Not directly pinout-compatible with XC4000/XC5200 —Differences in Mode pins  Spartan PQ208 pinouts optimized to add additional I/O

® Performance E Spartan Spartan-XL E-1 E XL-5 XL-4 Spartan Speed Grades  Higher speed grade = higher performance

® Speed, IP/Core Support Price FPGAs without RAM FPGAs with RAM ASIC Spartan Series Fills the FPGA Price-Performance and RAM “Gap” Spartan Series Meets ASIC Requirements: Price and Performance

® 0%25%50%75%100% On-Chip Memory Scan Test Micro- controller Peripherals Analog Many CORES require RAM (PCI, DSP, USB, etc.) ASIC IP/CORE Usage Source: Dataquest Spartan Series Meets ASIC Requirements: Cores/IP & RAM  Use of Memory in ASICs grew from 65% in 1995 to 78% in 1997

® Unit Cost Development Cost Unit Cost Development Cost NRE Lost Opportunity Cost of Ownership Per Unit ($) FPGAASIC FPGA Cost of Ownership Advantage No test vectors required Limited or no simulation Automatic Place and Route Re-spins in hours not months Faster Time-to-Market No NRE 1x 2x 10x Spartan Series Meets ASIC Requirements: Low Price

® Total Cost Management  Leading edge process technology —Smallest die size of any FPGA with on-chip RAM  Focused package offering —Low-power architecture allows use of highest volume plastic packages  Streamlined test flow —Lower cost test hardware —Built-in self test features and shorter test times  Optimized manufacturing flows

®  FPGA 2LM 0.6  FPGA 3LM 0.5  FPGA 3LM Advanced 0.5  FPGA Assembly Test Silicon Relative Cost Spartan Series addresses all aspects of cost 1997 Majority of cost is back end (assembly, test, overhead) Spartan Series die are pad limited Total Cost Management

® 20K 40K 200K 100K 10K Gates Per Dollar in 1999! $10 $5 Spartan-XL Spartan-II System Gates Spartan-III 30K 10K 30K 100K Spartan-III 500K 40K Price projections are for 250Ku, least-expensive package, slowest speed grade Priced for High-Volume Leadership

® SystemLogicVolume PkgGatesCellsPrice* XCS05XLPC845,000238$2.49 XCS10XLPC8410,000466$3.50 XCS20XLVQ10020,000950$4.25 XCS30XLVQ10030, $5.50 XCS40XLPQ20840, $7.40 Under $3 for 5,000 Gates!! *100Ku minimum volume, slowest speed grade Spartan-XL Family Pricing

® Any 5 V device Spartan-XL FPGA Advanced 0.35  3.3V Core 3.3V I/O 5V 3.3V 5V 3.3V Meets TTL Levels Spartan-XL Family Voltage Compatibility  Spartan-XL inputs accept 5V signals  Spartan-XL outputs drive standard TTL  100% compatible in 5 volt environment

® Spartan $3 95 per 5K gates Spartan $3 95 per 5K gates Price Spartan-XL $2 49 per 5K gates Spartan-XL $2 49 per 5K gates 0.35  5LM SpartanII up to 100K gates SpartanII up to 100K gates 0.5  3LM 2.5 Volt Higher Density + More Features Without Compromises Pricing competitive with ASICs High Performance On-chip SelectRAM TM PCI LogiCORE + AllianceCORE 3.3 Volt 5 Volt *Prices are for 100K units, slowest speed, lowest cost package 0.25  5LM Spartan Next Generation up to 200K gates Spartan Next Generation up to 200K gates 1.8 Volt 0.18  Higher Speed Lower Power Power Down Mode FPGA Price Leadership

® Spartan CLB  Two 4-input LUTs and one 3-input LUT  Two edge- triggered FFs

® Spartan IOB

® Single-Port RAM  Synchronous write, asynchronous read  16 x 2 or 32 x 1 max per CLB

® Dual-Port RAM  One common synchronous write port  Two asynchronous read ports  16 x 1 max per CLB

® 16 x 1 16 x 2 32 x 1 Edge- Triggered Timing Single- Port Dual- Port XXXX X X Supported RAM Modes  Per CLB:

® 32 bits A0 A1 A2 A3 A4 O1 2 bits DQ DQ Q1 Q2 CLB D1 D2 WE CLK D1 RAM Provides 16X the Storage of Flip-Flops  32 bits Vs. 2 bits of storage  32 x 8 shift register with RAM = 11 CLBs —Using flip-flops, takes 128 CLBs for data alone

® Rev. Software Capability 2.1i Spartan Libraries X Spartan-XL LibrariesX Spartan ImplementationX Spartan Speed FileX Spartan-XL ImplementationX Spartan-XL Speed File Service Pack Software Support for Spartan

® XC4000E Library Components Not Allowed in Spartan Designs  No Asynchronous RAM —No RAM16X1, RAM32X1 –Only RAM16(32)X1S, RAM16X1D, ROM16X1  No Edge Decoders —No DECODEx  No Wired-AND —No WANDx or WOR2AND  Mode Pins Not Usable as I/O —No MD0, MD1, MD2

® New Features in Spartan-XL Family  Higher speed (-4/-5)  8 flexible global low-skew buffers (BUFGLS)  CLB latches  Input Fast Capture Latch  Output multiplexer or lookup table  3.3V supply for low power with 5V tolerance —Programmable 3V input clamp for 3V PCI —Programmable 24 mA output drive for 5V PCI  Power-down pin  Improved boundary scan  Express parallel configuration mode

® Standard Chip External PLD 7K Gates 7K Gates Logic Component cost 100K units Standard Chip PCI Master I/F XCS20XL-4 TQ144* Solution <$7 PCI Master I/F *Supported devices: XCS20XL XCS30XL XCS40XL Power by $5 $20 $10 $15 Costs Less Than Standard ICs

® *Prices are for 100K units, plastic package XCS30XL Percentage of Effective Core Function Price Device Used Function Cost UART$6.9517%$ bit RISC Processor$6.9536%$ bit, 16-tap$6.9527%$2.00 Symmetrical FIR Filter Reed-Solomon Encoder$6.956%$0.50 LogiCORE PCI32 Spartan$8.2545%$3.80 (in PQ208) CORE Solutions

® Spartan Advantages Over Altera Flex 6K/10K  SelectRAM  Cores —PCI and DSP LogiCORE —AllianceCORE  Density —Five devices at both 3.3V and 5V  Performance —12% faster

® Altera Flex 6000  Flex 6000 = Lower Price Replacement for 8K —Based upon 1994 XC5200 technology —Positioned as “first” Gate Array replacement FPGA 6000 Advantages Improved Flex 8K routing Less expensive than 10K Equivalent performance to 8K Faster than XC Disadvantages Limited devices available today No RAM, no I/O Flip-Flops Limited footprint compatibility Slower than Spartan/XC4000 Non-Segmented Interconnect Limited software support

® System Features Comparison

® * A logic cell is a 4 input Look up table and a Flip-Flop ** XL and A represent 3.3V devices for Xilinx and Altera respectively Only 1 device for 5V, 3 devices for 3.3V 5 devices for 5V and 5 devices for 3.3V MaxXilinxLogicAlteraMax I/ODeviceCellsDeviceI/O 77XCS05/XL XCS10/XL EPF6010A XCS20/XL EPF6016/A204/ XCS30/XL XCS40/XL EPF6024A218 Spartan Series vs. Altera 6000/A

® Spartan Series vs. Altera 10K * A logic cell is a 4 input Look up table and a Flip-Flop ** XL and A represent 3.3V devices for Xilinx and Altera respectively Only 2 low density 3.3V devices 5 devices for 5V and 5 devices for 3.3V

® Xilinx Footprint Compatibility Leadership vs. FLEX 6K/A Spartan Altera 6KSpartan-XL Altera 6KA 5 Volt 3.3 Volt BG256 PQ240 PQ208 TQ144 VQ100 PC84 XCS05 XCS10 XCS20 XCS30 XCS A 6016A 6024A XCS05XL XCS10XL XCS20XL XCS30XL XCS40XL

® Xilinx Footprint Compatibility Leadership vs. FLEX 10K/A SpartanAltera 10KSpartan-XL Altera 10KA 5 Volt3.3 Volt BG356 BG256 PQ240 PQ208 TQ144 VQ100 PC84 XCS05 XCS10 XCS20 XCS30 XCS40 10K10 10K20 10K30 XCS05XL XCS10XL XCS20XL XCS30XL XCS40XL 10K10A 10K30A

® Spartan-XL Provides Lowest Power K Factor KE XCS30XL 6KA 10KA Spartan 6K 10K 2.5V3.3V 5.0V SpartanXL K Factor = 11

® Addresses the key needs of high-volume logic users No Compromises  High Performance  On-Chip SelectRAMTM  Wide range of IP and CORE solutions —PCI LogiCORE + AllianceCORE  Fully integrated software support  Volume Pricing competitive with ASICs