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Spartan-II + Soft IP = Programmable ASSP

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Presentation on theme: "Spartan-II + Soft IP = Programmable ASSP"— Presentation transcript:

1 Spartan-II + Soft IP = Programmable ASSP
High Volume Business Unit Xilinx Corporation

2 Programmable ASSP - Value
Benefits Time to Market Flexibility Product customization to meet customer needs Adapt to specification updates Feature upgrades Low risk evaluation of new markets Field upgradability H/W and S/W upgradability opens new applications Efficiently address lower volume strategic applications Distribution and inventory management

3 ASSP Replacement Dynamics
Flexibility System Features ASSP Spartan FPGAs migrate to higher densities to handle system features Maintaining low cost ASSP’s attempting to offer flexibility Differentiation need due to market pressures Available ASSP’s require programmable logic Changing system standards ASSP’s have large role in consumer, networking & data-processing Where Spartan FPGAs are successful PCI is the first successful ASSP competition

4 Higher Density Enables New Applications
Spartan-III 250K $10 Spartan-II 100K Spartan-XL 40K System Gates Ethernet MAC Cable Modem Video Line Buffer 30K Graphics Card The major point of this slide is that for any given price level, Xilinx will be offering more density over time. For example, while $10 can buy 100K gates in In the year 2003, $10 is projected to buy 500K gates. PCI-MIPS Bridge ATM IMA Office Networking 32-bit, 33-MHz PCI Reed Solomon Encoder HDLC UARTs Set-Top Box FIFOs PALs 64 Bit PCI Embedded μP Apps

5 A Successful Programmable ASSP
$20 External PLD 64K Gates $15 36% of XC2S100-4 Standard Chip PCI Master I/F Component cost 100K units $10 64K Gates Logic XC2S30XL Percentage of Effective Core Function Price Device Used Function Cost UART $ % $1.00 16-bit RISC Processor $ % $2.20 16-bit, 16-tap $ % $1.60 Symmetrical FIR Filter Reed-Solomon Encoder $6.00 6% $0.36 LogiCORE PCI64 $ % $3.15 (in PQ208) $5 PCI Master I/F Standard Chip Solution <$10

6 Programmable ASSP Advantages
Accommodate Specification Changes Testing and Verification Xilinx On-line - Field Upgradability Issues in creating a stand-alone ASSP

7 Accommodate Specification Changes
Emerging Markets are exposed to multiple standards and specification changes DSL Modem market 6 different variations DTV market 18 different formats Stand-alone ASSP Vendor Market A Programmable ASSP Future Proof’s Success

8 Testing and Verification
What do I do if my stand-alone ASSP does not perform as expected? Silicon Bug? Software driver? System Integration Issue? User Error? Programmable ASSPs are built on a proven FPGA technology Pre-verified silicon and guaranteed performance HDL simulators & test benches Chip-Scope - Run-time debug tools Probe any internal signal A Programmable ASSP is “Re-programmable”! Risk aversion is a tremendous value-add

9 Xilinx On-line Field Upgradability
A paradigm shift is being innovated by Xilinx Remote update of Software and Hardware Results in increased lifetime for a product Considerable maintenance and support savings Enable product features per end-user needs Opening up new opportunities in the ASSP area

10 Issues in creating a stand-alone ASSP
Choosing the right ASSP It is difficult identifying the right market and creating the right product for it Cost of creating a solution for the wrong market, or for a market that has moved is expensive Product Customization ASSPs traditionally fall into two camps Overdesigned - results in increased cost Underdesigned - requiring a PLD for product customization

11 Issues in creating a stand-alone ASSP
Development cost and amortization Stand-alone ASSPs have high NRE and engineering costs Mask charges for a 0.18-mm process can vary anywhere from $125K to $300K Spartan-II family has amortized cost by selling to the traditional PLD marketplace Their capability to act as a programmable ASSP does not increase product cost This allows programmable ASSPs to cost-effectively compete against stand-alone ASSPs A programmable ASSP is unaffected by hurdles stand-alone ASSPs face, resulting in cost-effective solutions

12 Spartan-II FPGAs Displace ASSPs
Three Camps… Feature-Replacement ASSPs ASSPs that Spartan-II FPGAs replace by virtue of its features Logic-Replacement ASSPs Generic ASSPs like HDLC, UARTs, PCI Bridges solutions Market Targeted ASSPs like Reed-Solomon, Viterbi, solutions Value-Added ASSPs Xilinx solutions that open up new market opportunities Synthesizable processors, PCI-X Controllers Solutions that specifically take advantage of specific features In all instances a Spartan-II solution is cost-effective and competes successfully against stand-alone ASSPs

13 Feature-Replacement ASSPs

14 Logic-Replacement ASSPs

15 Value-Added ASSPs

16 High Volume System Integration
SSTL3 GTL+ 5-volt tolerant I/O SDRAM QDR SRAMs MIPS mP 2x CLK PCI Clock Mgmt - Board deskew PLL $7.50 PCI Master/ Target Controller $15 SSTL-3 Translators $4 FIFOs Memory Dual Ports $7 $2 PCI-MIPS System Controller $40 $6 Backplane Drivers HSTL Translators Key Points: Virtex moves the FPGA from glue to system level component by addressing more than the logic needs of the designer. It helps the designer with a solution for board level challenges previously left to the designer solve with external components. Virtex FPGA is the perfect programmable system integration vehicle, providing high bandwidth communication interface to external devices such as CPUs, memory, and backplane and eliminates the need for custom logic, expensive clock management schemes, and various translator components including direct interface to backplanes with its GTL I/O capability.

17 Additional Information
Xilinx At Work website Application Notes White Papers Reference Designs Market Overviews Glossary IP Center IP cores and services FPGA Strategic Applications Group Applications group dedicated to providing system level expertise There is a considerable amount of support and documentation available from Xilinx including Applications Notes and White Papers. The Xilinx at Work web site also contains a wealth of information for creating programmable ASSPs. The FPGA Strategic Applications group can also be used to provide vertical market system solutions. This group is dedicated to providingsystem level expertise for various target vertical markets.


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