CSCI206 - Computer Organization & Programming

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Presentation transcript:

CSCI206 - Computer Organization & Programming Single Cycle Control zyBook: 11.4

Why do we need control?

MIPS with control logic shown

Morgan Kaufmann Publishers 24 November, 2018 ALU Control Assume 2-bit ALUOp derived from opcode Combinational logic derives ALU control opcode ALUOp Operation funct ALU function ALU control lw (100011) 00 load word XXXXXX add 0010 sw (101011) store word beq (000100) 01 branch equal subtract 0110 R-type (000000) 10 100000 100010 AND 100100 0000 OR 100101 0001 set-on-less-than 101010 0111 Chapter 4 — The Processor

Meanings of Control Signals Signal name Effect when deasserted(0) Effect when asserted(1) RegDst Reg. number for write comes from rt field [20:16]. Reg. number for write comes from rd field [15:11]. Branch Next instruction address comes from PC+4. Next instruction addr. comes from ALU (jump or branch). MemRead None. Data memory content designated by the input address are put on Read data output. MemtoReg The value fed to the register Write data input comes from ALU. The value fed to the register Write data input comes from the data memory. ALUOp See the ALU Control in previous slides. The 2-bit value combines with [5-0] to determine the value for ALU Control. MemWrite Data memory content designated by the input address is replaced by the value on Write data input. ALUSrc The second ALU operand comes from the second register file output (Read data 2). The second ALU operand is the sign-extended, lower 16 bits of the instruction. RegWrite The register on the Write register input is written with the value on the Write data input.

Truth Table for Control Function Signal R-format lw sw beq Input Op5 1 Op4 Op3 Op2 Op1 Op0 Output RegDst X ALUSrc MemtoReg RegWrite MemRead MemWrite Branch ALUOp1 ALUOp2 bit 31 bit 26