J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Electronics for the two-bar test. D.Breton & J.Maalmi (LAL Orsay)

Slides:



Advertisements
Similar presentations
Controller Tests Stephen Kaye Controller Test Motivation Testing the controller before the next generation helps to shake out any remaining.
Advertisements

A scalable DAQ system using the DRS4 sampling chip H.Friederich 1, G.Davatz 1, U.Hartmann 2, A.Howard 1, H.Meyer 1, D.Murer 1, S.Ritt 2, N.Schlumpf 2 1.
28 August 2002Paul Dauncey1 Readout electronics for the CALICE ECAL and tile HCAL Paul Dauncey Imperial College, University of London, UK For the CALICE-UK.
6 June 2002UK/HCAL common issues1 Paul Dauncey Imperial College Outline: UK commitments Trigger issues DAQ issues Readout electronics issues Many more.
Large Area, High Speed Photo-detectors Readout Jean-Francois Genat + On behalf and with the help of Herve Grabas +, Samuel Meehan +, Eric Oberla +, Fukun.
Status of LAV FEE electronics G. Corradi, C. Paglia, D. Tagnani & M. Raggi, T. Spadaro, P. Valente.
CALICE – 12/07/07 – Rémi CORNAT (LPC) 1 ASU and standalone test setup for ECAL MAIA BEE project Overview DAQ dedicated Sensor test In situ debug and maintenance.
Mathieu Goffe EUDET JRA1 meeting, DESY Wednesday 30 January 2008 IPHC, 23 rue du Loess BP 28, 67037, Strasbourg Cedex 02, France.
Status of the digital readout electronics Mauro Raggi and F. Gonnella LNF Photon Veto WG CERN 13/12/2011.
September 22, 2005 ESF Workshop-Perugia 1 Virgo Control Electronic upgrade Annecy/Pisa/EGO B.Mours.
Electronics for PS and LHC transformers Grzegorz Kasprowicz Supervisor: David Belohrad AB-BDI-PI Technical student report.
Status of Detector Prototype (for Hawaii meeting at Big Island) August 24, 2002 Yee Bob Hsiung For Koji Ueno, Yuri Velikzhanin Yanan Guo and Eddie Huang.
DLS Digital Controller Tony Dobbing Head of Power Supplies Group.
SODA: Synchronization Of Data Acquisition I.Konorov  Requirements  Architecture  System components  Performance  Conclusions and outlook PANDA FE-DAQ.
Understanding Data Acquisition System for N- XYTER.
K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 1 Development of fast electronics for the GRAPES-3 experiment at Ooty K.C. RAVINDRAN On Behalf of GRAPES-3 Collaboration.
Status of the Beam Phase and Intensity Monitor for LHCb Richard Jacobsson Zbigniew Guzik Federico Alessio TFC Team: Motivation Aims Overview of the board.
FADC progress in Vienna Reported by H.Ishino for Vienna FADC group M.Pernicka and H.Steininger.
HBD FEM Overall block diagram Individual building blocks Outlook ¼ detector build.
1 VeLo L1 Read Out Guido Haefeli VeLo Comprehensive Review 27/28 January 2003.
FED RAL: Greg Iles5 March The 96 Channel FED Tester What needs to be tested ? Requirements for 96 channel tester ? Baseline design Functionality.
TELL-1 and TDC board: present status and future plans B. Angelucci, A. Burato, S. Venditti.
March 9, 2005 HBD CDR Review 1 HBD Electronics Preamp/cable driver on the detector. –Specification –Schematics –Test result Rest of the electronics chain.
1 07/10/07 Forward Vertex Detector Technical Design – Electronics DAQ Readout electronics split into two parts – Near the detector (ROC) – Compresses and.
1 Calorimeter electronics Upgrade Outcome of the meeting that took place at LAL on March 9th, 2009 Calorimeter Upgrade Meeting Barcelona March 10th-11st,
LHCb Calorimeter Upgrade Meeting – 10th September 2012 – CERN LHCb Calorimeter Upgrade Electronics: ASIC solution status E. Picatoste, D. Gascon Universitat.
1 Calorimeters LED control LHCb CALO meeting Anatoli Konoplyannikov /ITEP/ Status of the calorimeters LV power supply and ECS control Status of.
1 Test Setups for the FE-I4 Integrated Circuit Stewart Koppell 8/1/2010.
BPM stripline acquisition in CLEX Sébastien Vilalte.
SKIROC ADC measurements and cyclic ADC LPC Clermont-Ferrand Laurent ROYER, Samuel MANEN Calice/Eudet electronic meeting Orsay June.
1 Carleton/Montreal Electronics development J.-P Martin (Montreal) Shengli Liu & M. Dixit (Carleton) LC TPC Meeting DESY Hamburg, 4 June 2007.
Electronics Workshop GlueX Collaboration Meeting 28 March 2007 Fast Electronics R. Chris Cuevas Group Leader Jefferson Lab Physics Division Topics: Review.
Rutherford Appleton Laboratory September 1999Fifth Workshop on Electronics for LHC Presented by S. Quinton.
Mai 31th 2011 Christophe Beigbeder PID meeting1 ETD meeting Test setup : Activities in Bari, Univ of Maryland and at Orsay Test setup : Activities in Bari,
X SuperB Workshop - SLAC Oct 06 to Oct 09, 2009 A.Cotta Ramusino, INFN Ferrara 1 SuperB IFR: outline of the IFR prototype electronics A.C.R
G.F. Tassielli - SuperB Workshop XI LNF1/11 02/12/2009 Status report on CLUster COUnting activities G. F. Tassielli on behalf of CLUCOU group SuperB Workshop.
PHOTOTUBE SCANNING SETUP AT THE UNIVERSITY OF MARYLAND Doug Roberts U of Maryland, College Park.
C.Beigbeder, D.Breton, M.El Berni, J.Maalmi, V.Tocut – LAL/In2p3/CNRS L.Leterrier, S. Drouet - LPC/In2p3/CNRS P. Vallerand - GANIL/CNRS/CEA SuperB -Collaboration.
Jihane Maalmi – Journées VLSI IN2P Towards picosecond time measurement using fast analog memories D.Breton & J.Maalmi (LAL Orsay), E.Delagnes (CEA/IRFU)
D.Breton, Orsay SuperB Workshop – February 16th 2009 Ongoing R&D in Orsay/Saclay on ps time measurement: a USB-powered 2-channel 3.2GS/s 12-bit digitizer.
D.Breton, E.Delagnes, J.Maalmi, J.Va’vra – LNF SuperB Workshop– December 2009 Picosecond time measurement using ultra fast analog memories: new results.
9530 T IMING C ONTROL U NIT Features TCU-1 Key Features 250ps timing resolution with < 50ps jitter 8 independent outputs with full individual programming.
DAQ ACQUISITION FOR THE dE/dX DETECTOR
DCH FEE STATUS Level 1 Triggered Data Flow FEE Implementation &
ETD meeting Architecture and costing On behalf of PID group
Pid session TDC-based electronics for the CRT
Update of test results for MCP time measurement with the USB WaveCatcher board D.Breton & J.Maalmi (LAL Orsay), E.Delagnes (CEA/IRFU)
Electronics for FTOF prototype: status of the 16-ch WaveCatcher board D.Breton & J.Maalmi (LAL Orsay) …
Proposal for Experiments
Designing electronics for a TOF Forward PID for SuperB D. Breton & J
Iwaki System Readout Board User’s Guide
ETD meeting Electronic design for the barrel : Front end chip and TDC
Update of time measurement results with the USB WaveCatcher board & Electronics for the DIRC-like TOF prototype at SLAC D.Breton , L.Burmistov,
Ewald Effinger, Bernd Dehning
DCH FEE 28 chs DCH prototype FEE &
Picosecond time measurement using ultra fast analog memories: new results since Orsay workshop. D.Breton & J.Maalmi (LAL Orsay), E.Delagnes (CEA/IRFU)
Designing electronics for a TOF Forward PID for SuperB D. Breton & J
PADME L0 Trigger Processor
MCPPMT test bench at LAL D. Breton, L. Burmistov, J. Maalmi, V
Ongoing R&D in Orsay/Saclay on ps time measurement: a USB-powered 2-channel 3.2GS/s 12-bit digitizer D.Breton (LAL Orsay), E.Delagnes (CEA/IRFU) Séminaire.
Using ultra fast analog memories for fast photo-detector readout D
Front-end digital Status
Front-end electronic system for large area photomultipliers readout
Christophe Beigbeder/ ETD PID meeting
VELO readout On detector electronics Off detector electronics to DAQ
PID electronics for FDIRC (Focusing Detector of Internally Reflected Cherenkov light) and FTOF (Forward Time of Flight) Christophe Beigbeder and Dominique.
Tests Front-end card Status
STAR-CBM Joint Workshop Heidelberg, Physikalisches Institut
PID meeting Mechanical implementation Electronics architecture
Ongoing R&D in Orsay/Saclay on ps time measurement: status of the USB-powered 2-channel 3.2GS/s 12-bit digitizer D.Breton & J.Maalmi (LAL Orsay), E.Delagnes.
Presentation transcript:

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Electronics for the two-bar test. D.Breton & J.Maalmi (LAL Orsay)

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 For the two-bar test at SLAC, we had to build a synchronous sixteen channel acquisition system based on 8 two-channel WaveCatcher V5 boards: 1.The system has to work with a common synchronous clock  There we take benefit of the external clock input of the WaveCatcher V5 2. It is self-triggered but it also has to be synchronized with the rest of the CRT  True not only for running acquisition but also for time tagging of events 3. Like the WaveCatcher, data acquisition is based on 480Mbits/s USB. Introduction

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Experimental setup Patch panel 16 SMA connectors To amplifiers PM-side harness Trigger for the electronics crate (QTZ3) Faraday cage

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 PM-side harness All the lines between the MCP anodes and the cable inputs are 14.7mm long

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September Trig out CH0 CH1 Clk in Trig out Trig inTrig out CH0 CH1 Clk in Trig out Trig inTrig out CH0 CH1 Clk in Trig out Trig inTrig out CH0 CH1 Clk in Trig out Trig inTrig out CH0 CH1 Clk in Trig out Trig inTrig out CH0 CH1 Clk in Trig out Trig inTrig out CH0 CH1 Clk in Trig out Trig inTrig out CH0 CH1 Clk in Trig out Trig in USB Clk out Trig out Trig in Ext trig in 36dB Amp 36dB Amp 36dB Amp 36dB Amp Ext trig out Clock and control board Patch panel 16 amplifiers DAQ PC From QTZ3 USB hub USB 8 8 USB WaveCatcher V5 Electronics setup

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 MITEQ amplifier Model: AM Input and output connector: SMA Frequency Minimum1 MHz Frequency Max1000 MHz Electrical Specifications Gain Minimum36 dB Gain Flatness0.75 dB+/- Noise Figure3.3 dB Voltage 1 (Nominal)15 V Current 1 (Nominal)150 mA Impedance50 Ohms Price: Per /1435 Euros Per /16400 Euros

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Clock and control board (1) From WaveCatchers From QTZ3 To WaveCatchers CRT mode : when the controller board detects a coincidence between an external trigger from QTZ3 and one of the sixteen channels, it sends through USB a specific interrupt to the PC in order to start the data readout.

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Clock and control board (2) Clock outputs µ USB Reference clock: 200MHz Trigger Input (NIM) Trigger Output (NIM) Cyclone FPGA +5V Jack plug USB interface => 480Mbits/s Pulse output Zero jitter clock buffer Trig inputs Trig outputs

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 The USB WaveCatcher board V5 SAM Chip Dual 12-bit ADC 1.5 GHz BW amplifier. µ USB Reference clock: 200MHz => 3.2GS/s 2 analog inputs. DC Coupled. Trigger fast discriminators Trigger input Pulsers for reflectometry applications Board has to be USB powered => power consumption < 2.5W Trigger output Cyclone FPGA +5V Jack plug USB interface => 480Mbits/s Clock input

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Technical challenge: to keep the 10ps precision at the crate level Logistical challenge: to have a running system mounted at SLAC the 13th of September –The controller board was designed end of June –Production of 10 WaveCatchers V5 was launched at the same time –A first small system with 4 channels was mounted and succesfully tested at CERN mid July on new high speed MRPCs Time measurements showed that even between different boards, the 10ps rms time precicion was still there. The full crate was assembled at LAL end of August. –We had a very little time to test it because of the shipping delay –Difficulties appeared to be mostly linked to USB because of the high number of slaves (7 is a key number for USB) We were lucky to get the amplifiers on time (they left LAL the 6th and arrived at SLAC the 9th after visiting Sacramento!) Tests at lab

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September channel prototype

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Crate for WaveCatcher boards

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Baseline uses sixteen individual 36 dB amplifiers but a solution with a board housing 16 amplifiers with programmable gain is under study –It could be used for the second step based on SL10 –It is necesssary to test it in view of the final design Common trigger for the WaveCatcher boards is the signal produced by QTZ3: –This will stop the signal recording into the analog memory –but readout is performed only if at least one of the two-bar channels were hit (done through a OR of the individual triggers on signal) Upon each event, the acquisition software adds the event time in the data file –=> synchronization of events with the CRT µPC –time is regularly (once per minute) synchronized with SLAC time server (as µPC also does) via NTP time server. Comments about electronics

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Setup at SLAC

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 The whole system

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Back of the crate

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Extension of the WaveCatcher software to 16 channels –Each board can be set up independently –All channels can be displayed simultaneously –Run data can be split into multiple fixed size files (based on the user defined number of events) => permits run survey –A log file stores all messages generated during acquisition. Soon available: real time histogramming of inter-channel pulse time difference With the laptop we use at SLAC, there was no way to run all the 9 boards on the same USB port –=> we had to share the boards between the 3 ports –Once the acquisition launched, USB looks stable (we can take very long runs => one week) Acquisition software

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 MultiWaveCatcher Main Panel

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 MultiWaveCatcher Board Panel

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Setup with computer

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 Running conditions

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 One cosmic event Recycled 6U crate Naked WaveCatchers mounted on 3U carrier boards

J.Maalmi, D.Breton – SuperB Workshop – Frascati – September 2010 We extended the WaveCatcher system up to 16 channels (hardware + software) The performance of the single board seems to be maintained despite the increased complexity (noise, jitter, …) Cosmic data taking has already started on the two bars at SLAC, in coincidence with the CRT data We are currently building a second 16-channel system for our own PMT test bench at LAL, plus a portable 4-channel one for travelling We will design a new 16-channel board, housing USB and high speed optical link, which will permit an easy upscaling of the number of channels Conclusion