EE143 –Ali JaveySlide 10-1 Section 10: Layout. EE143 –Ali Javey Layout Design Rules (1) Absolute-Value Design Rules * Use absolute distances (2) -based.

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Presentation transcript:

EE143 –Ali JaveySlide 10-1 Section 10: Layout

EE143 –Ali Javey Layout Design Rules (1) Absolute-Value Design Rules * Use absolute distances (2) -based Design Rules 2 Slide 10-2

EE143 –Ali Javey Metal-Si Contact Hole Min. contact hole = 2 x 2 Min contact hole to diffusion layer distance = n+n+ p-sub SiO 2 n+n+ p-sub SiO 2 Al (same rule for Metal-poly) Slide 10-3

EE143 –Ali Javey Metal Lines Min. metal-metal spacing = 3 Line 2 Line 1 [Rationale] metal runs on rough topography 3 spacing to ensure no shorting between the 2 lines. Min width = 2 Slide 10-4

EE143 –Ali Javey Min overlap of contact hole = Si Etching problem CVD SiO 2 deposition. problem in narrow gap SiO 2 M1-Contact Overlap Slide 10-5

EE143 –Ali Javey Poly-Si Gate n+n+ n+n+ n+n+ Min gate-overlap of field oxide = Avoid n+ channel formation during S/D Implant ideal With overlay error Slide 10-6

EE143 –Ali Javey Al Poly SiO 2 Si ~400 O C Al Poly SiO 2 Si Al spike Al Poly gate Comment: Al to poly contact should not be directly on top of gate oxide area Si Gate oxide Gate contacting Slide 10-7