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Process integration 2: double sided processing, design rules, measurements sami.franssila@aalto.fi.

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Presentation on theme: "Process integration 2: double sided processing, design rules, measurements sami.franssila@aalto.fi."— Presentation transcript:

1 Process integration 2: double sided processing, design rules, measurements

2 Equipment: 1- or 2-sided processing
Beam processes 1-sided Immersion processes 2-sided -photon beams (=lithography) -liquids (=wet etching) -atom beams (=evaporation) -liquids (=cleaning) -ion beams (=implantation) -gases (= oxidation, diffusion) -mixture of beams (=plasmas) -gases (=CVD)

3 Double-sided processes
Thermal oxidation CVD Wet etching Wet cleaning

4 Single side processes Ion implantation PECVD, RIE

5 Wet etch vs. plasma etch Oxide wet etch in HF
Oxide plasma etch in CHF3 Film removed from backside Undercutting etch profile Film remains on backside Vertical sidewalls profile

6 Fluidic filters a c b d

7 Cross section vs. layout view

8 Top view Cross section view

9 Fluidic filters (2) Criteria:
Need one or two wafers ? Cost, bonding... Pass size determined by litho ? Bonding ? Flow resistance ? Aperture ratio. Clogging ? Active cleaning ?

10 Fluidic filters Lithography and etching determine pass size
b c d Lithography and etching determine pass size Thin film deposition determines pass size Lithography and etching determine pass size Bonding/etching determines pass size

11 Pass size by thin film deposition
Litho & etch ”red” film

12 Etch ”black” film Front view

13 Alignment and design rules
Example of Overlap rule: Coinciding structures must overlap by (LW/3)

14 Alignment and design rules
There is no perfect alignment  overlap used: Coinciding structures must overlap (by ~LW/3)

15 Design rules (2) Correct mask size and perfect alignment
Correct size but misaligned Correct alignment but mask size error b c

16 Design rules (3) Top electrode is made smaller than bottom electrode, to make sure that it lands on capacitor dielectric on planar area. CVD ox-1 CVD ox-2 fused silica CVD ox-3 capacitor Mo resistor SiCr resistor Au-coil nitride Capacitor area

17 Design rules (4) Minimum linewidth rule Minimum spacing rule
Initial assumption: minimum LW = minimum space Overlap rules for structures on different layers Breaking design rules ruins your process (=you are expecting too much from the process) Within one layer

18 Resistor design Give design rules for resistor !
#2 contactsholes #3 metallization Give design rules for resistor ! Note that wet etched and plasma etched processes have different design rules !

19 Self-alignment: CMOS gate
N+ areas automatically aligned relative to poly gate. No overlap needed. Poly does not need separate doping step: it is doped by the same implant as N+ areas. poly N+ N+ P-well

20 Order of process steps

21 NbN bolometer in SEM Figure courtesy Leif Grönberg, VTT

22 Bolometer Bolometer mask view process flow 6) 2nd lithography
7) Oxide etch 8) Silicon isotropic etch 1) CVD oxide 2) Metal deposition 3) Lithography 4) Metal etching 5) Resist strip

23 Critical vs. non-critical steps
Bonding defines 1 µm capacitor gap Bonding creates 500 µm channel

24 (Non)Uniformity Thermal oxidation
Spin coating Excellent uniformity, 1% ALD RIE CVD Uniformity 3-5% Sputtering CMP 10% uniformity

25 Mapping and uniformity
To check something across the wafer, we must have a quick monitoring measurement that can be repeated many times. Ellipsometer measurement of oxide thickness

26 Cost of measurement If the wafer is consumed in the measurement, the cost of measurement will be at least the wafer cost  tens of euros € equipment, operator cost is € for 5 years, 1 sec/measurement, 49 points/wafer  1500 wafers/day, 2.5 million/5 years  cost of mapping the wafer is 8 cents. If chips/wafer  4 µcents/chip Hot-wall MOCVD for highly efficient and uniform growth of AlN A. Kakanakova-Georgieva · R. R. Ciechonski · U. Forsberg · A. Lundskog · E. Janzén Crystal Growth & Design 2008

27 Film characterization needs
-spatial resolution (image spot size) -depth resolution (surface vs. bulk properties) -elemental detection (constituents, impurities) -structural information (grain structure) -dimensional characterization (thickness) -mechanical properties (curvature, stress,…) -surface properties (roughness, reflectivity,…) -top view vs. cross sectional imaging -…

28 Sputtered TiN characterization

29 Process monitoring Measurement = general term
Monitoring = quick measurement in production Problem Measurement Monitoring in R&D phase in production Gate oxide thickness TEM cross-section Ellipsometer Implant dose SIMS profile Sheet resistance Stress X-ray rocking curve Wafer bow Ti:N ratio in TiN Auger spectroscopy Resistivity


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