Comp201 Computer Systems Register Notation

Register Notation e.g. [$3] <- [$3] + [$4] Used to represent the data transfers between the parts of the CPU during the execution of an assembly language instruction Register is represented by its initials (e.g. PC, R0 etc) The contents of a register are shown by enclosing the register symbol in square brackets [PC] The operation of data transfer is shown by <- e.g. [$3] <- [$3] + [$4] This would be interpreted as “take the contents of $3, and add the contents of $4, placing the result in $3”

More detail about timing: Each CPU operation is carried out under the control of the controller which can: make a register output a value onto a bus (eg1. PC_out) (eg2. a_out, sel_a = 4) set up the ALU or memory interface to carry out a particular function (func = add) make a register read a value from a bus (eg1. $5) (eg2. C_in sel_c = 5) For instance, to add the contents of $4 to the PC, storing the result back in the PC on the 3 bus architecture : PC_out, a_out, sel_a = 4, func = add, alu_out, PC_in and wait sufficient time for the transfer to take place - usually a clock cycle

Signals must stabilise before clock Control Step Each control step takes one clock cycle Source registers output here Destination registers read values here Clock cycle Signals must stabilise before clock Signals propagate through system

Showing the data paths from the previous example, PC_out, sel_a = 4, a_outt, func = add, alu_out, PC_in Memory MI PC Reg File (R0-R15) ALU A B C C Bus B Bus A bus IR TEMP

Timing Example: Register Register D Q R2 R1in R1out R2in R2out 1 clk Z RTL: [R2] <- [R1] actions: R1out, R2in clk R1 output R2 input

Another example: Register ALU Register time to settle clk: RTL: outputs enabled inputs read R1 Q clk [R3] <- [R1] + [R2] 3 D R3 R3 Q R1in R1out clk actions: R2 Q clk func 5 R1out, R2out, add, R3in R3in R3out R2in R2out

Eg. - Register ->ALU -> Register 3 5 Z R1 D Q clk: clk RTL: 3 [R3] <- [R1] + [R2] 8 R3 D Q R3 R1in R1out clk actions: R2 D Q 8 clk func R1out, R2out, add, R3in 5 R3in R3out R2in R2out Z

Register Transfer Notation Imm_16_out Imm_20_out sel_a a_out sel_b alu_func pc_in pc_out b_out sel_c c_in alu_out temp_out temp_in mem_read mem_write sign_extend ir_in 1 2 The execution of an assembly language instruction may require a sequence of such steps e.g. to fetch an instruction [IR] <- M[[PC]] [PC] <- [PC] + [1] Or, to perform a jal command, [PC] <- [PC] + [1] (if not already done) [ra] <- [PC] [PC]<- location of call Or, to perform a lw command, [temp] <- [$base] + disp [$dest] <- M[temp] . X X X X X X

More about RTL descriptions Register transfer language lets you define computer operations unambiguously in an "algebra-like" notation. The RTL expression [$3] means the contents of register 3 (i.e., whatever is in register 3). The RTL expression [M(1234)] means the contents of memory whose location (i.e., address) is 1234. Or, sometimes expressed as 0x1234 to denote hex. The RTL expression <-  means "is copied to" (from right to left). You cannot write the expression $3 = 4 in RTL, as it would mean that register 3 is the same as the number 4. The correct expression is [$3] = 4 which means that register 3 holds the value 4. The RTL expression D3 <- 4 is also meaningless. The expression should be [D3] <- 4.

WRAMP Instructions in Register Notation In the tables in the back of the WRAMP manual, the instructions are shown in RTL notation, e.g.: sub Rd, Rs, Rt sle Rd, Rs, Rt beqz Rs, offfset jal address Rd <- Rs - Rt Rd <- Rs < Rt if (Rs=0) PC<-PC+offset $ra<-PC, PC<-Address