1. Control Unit Operation
CHAPTER 16
Control Unit Operation
THE CONTROL UNIT’S MICRO-OPERATIONS
By: MERLE SODEN
CONTROL OF THE PROCESSOR
By: YULEISYS TORRES
HARDWIRE IMPLEMENTATION
By: LESTHER MARTI

2. MICRO-OPERATIONS
In this presentation today I hope to give you a better understanding of what the term “micro-operations” means in the instruction cycle as it pertains to the Control Unit.

3. CONTROL UNIT
We cannot begin a discussion about micro-operations of the CONTROL UNIT unless we first discuss the CONTROL UNIT itself.
If you don’t already know, the control unit is that portion of the CPU that actually initiates instructions.
It is similar to your brain creating a thought.

4. INSTRUCTIONS
When I refer to the word INSTRUCTION, I am referring to a cycle of commands initiated by the CONTROL UNIT to carry out the thought of a user. The following are a list of instructions that you are already familiar with.
FETCH
INDIRECT
INTERRUPT
EXECUTE
INSTRUCTION

5. Getting back to the term: micro-operations
In each movement of the previous cycles (ie. Fetch…) the instructions are executed during an instruction cycle made up of shorter cycles.
Because the performance of each sub cycle involves one or more shorter operations we coin the term “Micro-Operations”.

6. Let me explain further
As we already know the beginning of the instructions cycle starts with the FETCH CYCLE. Right?
Now you might be thinking to yourself, “Yeah, I already know about the fetch cycle, and the indirect cycle and the interrupt cycle and all that stuff right?”

7. Still wondering what that has to do with the micro-operations?
And so you are also probably wondering what does that have to do with Micro Operations in the control unit right?

8. Cycles Well let me answer that for you.
Lets start with the FETCH CYCLE and see what happens there;
In the FETCH CYCLE, we know the following;

9. WHAT HAPPENS DURING THE FETCH CYCLE?
The address of the next instruction to be executed is in the program counter
The first step is to move that address to the memory address register (MAR),
The second step is to bring the address (in the MAR) and place it on the address bus.
(And don’t forget the PC will increment by 1 to get ready for the next instruction.)
At this time, the control unit issues a READ command on the control bus, and the result appears on the (MDR).
The last step is to move the contents of the MDR to the instruction register (IR).
Symbolic short hand description of the moves.
PC------MAR
PC+1----PC
RAM---MDR
MDR---IR
- OR -
t1: MAR (PC)
t2: MBR Memory
-PC (PC) + I
t3: IR (MBR)
* Where the notation (t1, t2, t3) represents successive time units or clock pulses

10. DIAGRAM OF PROGRAM EXECUTION

11. MICRO-OPERATIONS - SIMPLY PUT
As you can see, in the FETCH CYCLE, although there are three operations, there are actually four micro-operations, and each micro-operation involves the movement of data into or out of a register.

12. Indirect Cycles Let’s look at The Indirect Cycle it’s the same thing,
Once an instruction is fetched, the next step is to fetch the operands. This creates more operations and micro-operations.
Symbolic short hand description of the moves.
t1: MAR +- (IR(Address))
t2: MBR <— Memory
t3: IR(Address) — (MBR(Address))

13. The Interrupt Cycle Next let’s look at The Interrupt Cycle
At the completion of the execute cycle, a test is made to determine whether any enabled interrupts have occurred. If so, the interrupt cycle occurs.
Here are its Operations and micro-operations
Symbolic short hand description of the moves.
t1: MBR (PC)
t2: MAR Save-address
PC +- Routine-address
t3: Memory +- (MBR)

14. Last but not least  Symbolic short hand description of the moves.
Last but not least let’s look at The Execute Cycle.
First; consider an add instruction:
ADD R1, X
This particular case adds the contents of the location X to register R1. The following sequence of operations and micro-operations might occur:
Symbolic short hand description of the moves.
t1: MAR (IR(address)),
t2: MBR Memory
t3: RI- (RI) + (MBR)

15. In closing
In closing we have seen that each phase of the instruction cycle can be decomposed into a sequence of elementary movements called micro-operations.
Thank you.

16. Control of the Processor
The Control Unit is the engine that moves the computer.
It is the responsibility of the control unit to cause the execution of instructions.

17. Functional requirements
Control Unit:
Basic elements of a processor.
Micro-operations that processor performs.
Functions that the control unit must perform to allow the execution of the micro-operations.

18. essential elements of processor
The basic elements of a processor are:
The ALU
Registers
Internal data path
External data path
Control Unit

19. Micro-operations Micro-operations : Transfer data between registers
Perform arithmetic or logical operations using registers as sources and as destinations for result.
Transfer data from outside the processor to a register.
Transfer data from a register to outside the processor.

20. TASKS The control unit performs two elementary tasks: Sequencing
Execution

21. Control signals Control signals: Externally
Input that gives the status of system.
Outputs that allow it to manipulate the system.
Internally
The capabilities to perform sequencing and execution.
Three types of control signals:
Trigger ALU functions
Trigger a data path
External triggers (to bus or other external element)

22. Input and output Control signals
Inputs:
Clock
Instruction Register (IR)
Flags
Control Signals from Control Bus
Control Unit IR
Control signals within CPU
Control signals to system bus
Control bus
Control signals from system bus
Clock
Flags
This is sometimes referred to as the processor cycle time. or the clock cycle lime. This is sometimes referred to as the processor cycle time. or the clock cycle lime. This is sometimes referred to as the processor cycle time. or the clock cycle lime. This is sometimes referred to as the processor cycle time. or the clock cycle lime.
Outputs:
Control Signals to Control Bus
Control Signals within processor

23. Control signals
Control unit keeps track of what part in the instruction cycle it is currently in.
Fetch Cycle:
Transfer contents of PC to MAR.
Read memory into the MBR and increment the PC.
End of Fetch Cycle:
Indirect cycle or execute cycle.

24. Control signals - simulation
Fetch
MBR AC PC
+ 1 IR
ALU
MAR
Control
Signals
Control Unit
Control Signals

25. Internal processor organization
A single internal bus
Gates and control
Additional control signals
Two additional registers. Y and Z.
Register Z

26. Intel pentium
In the Intel Pentium 4, which was introduced in 2000 is here Intel has redesigned their microprocessor architecture.
42 million transistors
Started new trend
Supports SSE3
FPU
SIMD (Single Instruction Multiple Data)
Additional MMX registers
Addditonal MMX Instruction code
The execution unit is capable of processing multiple instructions concurrently.
Simple integer processes performed and stored in the out-of-order area in C.U. until needed.
Complex integer and floating-point processes are streamlined.
Registers used as local storage.

27. Hardwired Implementation
Combinatorial circuit
Type of logic circuit
Input logic signals are transformed into a set of output signals
Control unit signals
Logic circuit
Input signal
Output signal

28. Hardwired Implementation
Control unit inputs
Instruction register
Flags
Controls bus signals
Clock

29. Model of control unit

30. Control unit with decoded inputs

31. Hardwired Implementation
Instruction register
Stores the instruction currently being executed
Holds the instruction while it is being decoded
Uses an op-code to perform different instructions
Unique logic for each op-code
Decoder takes encoded input and produces single output

32. Flowchart for instruction cycle

33. Hardwired Implementation
Flags
Status register
Contains current state of the processor
Stores binary values or codes
One or more bits
Each bit means something

34. Hardwired Implementation
Control bus signals
Wiring of the control unit
Communicates the CPU with other devices within the computer
Differs from the Address and Data bus
Carries commands from the CPU and returns status signals from the device

35. Hardwired Implementation
Clock
Controls the signals in the control unit during the instruction cycle
Repetitive sequence of pulses
Measures the duration of micro-operations
Long periods to allow propagation of signals
Needs a counter with different control signals for t1, t2 etc.

36. Problems with hardwired designs
Complex sequencing & micro-operation logic
Difficult to design and test
Inflexible design
Difficult to add new instructions

37. ReferencES: Book and related websites
Computer Organization and Architecture
By: William Stallings(Preferred)
Websites:

38. Review questions What are the two basic tasks of the control unit?
What provides the status of the processes?
What is used to transfer information in and out of the processor?
What is the importance of the control unit?
What is a micro-operation?
What cycle initiates the instruction cycle?
What are the four control unit inputs?
What does the control bus signal do?
What does the instruction register do?
What might possibly happen in each time cycle? -