1. By: A. H. Abdul Hafez Abdul.hafez@hku.edu.tr, ah.abdulhafez@gmail.com
Computer Architecture and Organization: L06: Stored program and Instruction code
By: A. H. Abdul Hafez
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

2. Outlines Basic computer design Instruction code
Computer and CPU organization
Addressing modes
Computer registers
Common bus system
Instructions types:
Memory reference
Register reference
Input-output
End
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

3. Basic computer design
The user of a computer can control the process by means of a program.
A program is a set of instructions that specify the operations, operands, and the sequence by which processing has to occur.
An instruction is a binary code that specifies a sequence of micro- operations.
Instructions and data are stored in memory.
The basic computer has Memory, 1 processor register and an instruction code format with two parts
4096x16
Memory
Instructions
(program)
opcode
Operand or address
Operands
(data)
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

4. Instruction Code
Instruction code is a group of bits that tell the computer to perform a specific operation.
The instruction code is an opcode plus additional information, such as a memory address and operands.
Opcode: Defines operations such as add, subtract, multiply, shift and complement
The number of bits required for the operation code of an instruction depends on the total number of operations available in the computer, n bits for 2n operations.
opcode
Operand or address
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

5. Instruction Code
The control unit receives the instruction from memory and interprets the operation code bits.
It then issues a sequence of control signals to initiate microperations in internal registers.
For every operation code, the control issues a sequence of microoperations needed for the hardware implementation of the operation.
An operation code is called macro-operation because it
specifies a set of micro-operations.
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

6. Stored program organization
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

7. Computer Organization
The CPU coordinates data transfers between itself and memory or I/O devices.
The paths shown here not only carry data, but also the control signals which cause data to be transferred.
They also carry address information which is used to select the correct memory location or I/O port address.

8. CPU Organization
The control unit issues signals to coordinate functions of the ALU, the registers and external hardware.
By issuing these signals in the proper order, they cause a sequence of operations to occur.
By performing this sequence, an instruction is fetched, decoded and executed.

9. Addressing modes Immediate addressing: Direct addressing:
It is sometimes convenient to use address bits of an instruction code not as an adress but as the actual operand when the second part of an instruction code specifies an operand.
Direct addressing:
The operand’s address is stored within the instruction word.
I bit is 0 for direct address.
The operand is at the location specified by the adress stored within the instruction word.
Indirect addressing:
The operand’s address is stored within another memory register, whose address is specified within the instruction word.
I bit is 1 for indirect address.
Effective address: address of the operand in a computation type instruction or the target adrress in a branch type instruction.
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

10. Direct and Indirect Addressing
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

11. Computer Registers 11 PC
Memory
4096 words
16 bits per word 11 AR 15 IR 15 15 TR DR 7 7 15
OUTR
INPR AC
DR – Data Register– Holds Memory Operand
AR – Address Register– Holds address for memory
AC – Accumulator– Processor Register
IR – Instruction Register– Holds Instruction Code
PC – Program Counter – Holds address of Instruction
TR – Temporary register – Holds temporary data
INPR / OUTR- Input / Output Register – Holds Input / Output Character

12. Common Bus System
The CPU is designed around an internal common bus with a common clock.
Each register can place its data onto the bus, and has internal tri- state buffers on the outputs.
The control unit must make sure that at most one register (or memory unit) places data onto the bus at one time.

13. CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

14. The basic computer has three instruction code formats :
Instruction Types
The basic computer has three instruction code formats :
opcode
address I
(a) Memory reference instruction format
(Opcode = 000 through 110)
1 1 1
Register operation
(b) Register reference instruction format
(Opcode = 111)
1 1 1
I/O operation 1
(c) Input-output instruction format
(Opcode = 111)

15. Memory reference instructions
Memory reference instructions are those that reference memory. Some read data from memory, others write data to memory, and one instruction does both.
The most significant bit is the indirect bit. If this bit is 1, the instruction must use indirect memory addressing. That is, the address given is not the address of the operand. It is the address of a memory location which contains the address of the operand.

16. Memory reference instructions ...
The next three bits are the OPR field, or operation field. These three bits may take on any value except for 111; that is reserved for other instructions.
OPR field tells the CPU which instruction is to be performed.
The12 low order bits contain the memory address to be used by this instruction (or in the case of indirect mode the address of a memory location which contains the address to be used by this instruction).

17. Memory Reference Instructions
SYMBOL
HEX CODE
DESCRIPTION
I=0
I=1
AND
0xxx
8xxx
AND memory word to AC
ADD
1xxx
9xxx
Add memory word to AC
LDA
2xxx
Axxx
Load memory word to AC
STA
3xxx
Bxxx
Store Content of AC in Memory
BUN
4xxx
Cxxx
Branch unconditionally
BSA
5xxx
Dxxx
Branch and Save return address
ISZ
6xxx
Exxx
Increment and Skip if zero
Where xxx represents the memory address in hexa.

18. Register Reference Instructions
Register reference instructions are those which access data and manipulate the contents of registers.
They do not access memory.
These instructions are executed in one clock cycle.
Note that the 12 low-order bits serve a different function depending on the instruction format used.

19. Register Reference Instructions
SYMBOL
HEX
DESCRIPTION
CLA
7800
Clear AC
CLE
7400
Clear E
CMA
7200
Complement AC
CME
7100
Complement E
CIR
7080
Circulate right AC and E
CIL
7040
Circulate left AC and E
INC
7020
Increment AC
SPA
7010
Skip next instruction if AC positive
SNA
7008
Skip next instruction if AC negative
SZA
7004
Skip next instruction if AC zero
SZE
7002
Skip nexyt instruction if E is 0
HLT
7001
Halt computer
register reference instructions are performed in a single clock cycle.

20. I/O Instructions This class of instructions accesses I/O devices.
The instructions in this class also enable and disable interrupts.
Since this computer (The Basic Computer) only allows for a single input device and a single output device, no address information is needed.

21. I/O Instructions SYMBOL HEX DESCRIPTION INP F800 Input Character to AC
OUT
F400
Output Character from AC
SKI
F200
Skip on Input Flag
SKO
F100
Skip on Output Flag
ION
F080
Interrupt on
IOF
F040
Interrupt off
I/O instructions are performed in a single clock cycle.

22. The end of the Lecture Thanks for your time Questions are welcome
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019