BWS electronics design status 25.06.2015 J.Emery & Luca, Pierre-Jean, Emiliano, Jose, Alexander and all past contributors!

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Presentation transcript:

BWS electronics design status J.Emery & Luca, Pierre-Jean, Emiliano, Jose, Alexander and all past contributors!

Secondary particles shower acquisition Scanner control, monitoring and supplies “Intelligent drive” Acquisition and supervision CPUCPU CPUCPU TIMINGTIMING TIMINGTIMING BST receiver Future Scanner Control and Acquisition System Fast integration secondary shower SFP Ethernet SFP Optical link Long range resolver interface 3-phases PWM Magnetic stopper External temperature and vibration Wire resistivity & Strain gauge HVCTRLHVCTRL HVCTRLHVCTRL Optical encoder interface

Scanner Control, Monitoring and Supplies ‘Intelligent drive’ CPUCPU CPUCPU CTRVCTRV CTRVCTRV IBMSIBMS IBMSIBMS BOBRBOBR BOBRBOBR BWS SPS PROTOTYPE SETUP 2015 Front-End Fast integration (IGLOO2 BASED) Optical encoder interface Wire resistivity 3-phases PWM Long range resolver interface Ethernet TCP/IP Feedback, positions profiles, optimisation Prototyping, Calibration, First measures into LDB Start scan trigger HV power supply Back-end GBT receiver (IGLOO2 BASED) Acquisition synchronisation COM Acquisition trigger

Intelligent drive Power crate integration Integration of motor driving parts connectors Measurements Voltage supplies 3 phases power driver Motor and control connectors Custom crate Voltages supply measures board design on-going

Electronics Hardware deliverable DescriptionDeliveryStatusTask scompleted Open tasksIdentified issues FMC interface to scanner MayOn- going Interfaces (MM + PJL) Debug PCB + measures several changes on the PCB (JE) SPS surface setupJuly0%Order VME crate rack space Motor Drive boxAugustOn- going 70% Mechanics & electrical PCB design (15 June 2015) Controller boxSeptember0% Filter boxSeptember20%PCB design commun with Drive box, filter investigation Filter size and weight SPS surface installation October0%rack space

Intelligent drive Actuator control interface FPGA board Firmware development platform Custom interface board Scanner actuator control and measurements

Firmware deliverable DescriptionDeliveryStatusTasks completedOpen tasksIdentified issues Motor interface Current-Resolver MayOn-going80% Current interfaces Resolver interface PWM interface debugResolver measure stability FeedbackJuneOn-going60%Debug & Final testing Speed computation & code optimisation HPS Ethernet tools for debug JuneOn-going70%Continuous logging data Acq speed limit Movement sequencer and trigger July20% Data logger (SDRAM)September50%Data organisation Optical sensor Interface fast ADC October0% Safe FPGA-HPS bootOctober0% Wire InterfaceNovember0%

System level deliverable 2015 DescriptionDeliveryStatusTasks completedOpen tasksIdentified issues Lab scanner: Qualifications with DSpace AprilAlmost done Tune of controller + measures Qualification procedure/report Glass disk broken Rotos – sharft fixation Stator resolver fixation Prototype 2: Qualifications with DSpace May July? Waiting: proto 2 -Tune of controller + measures + report Prototype 2: Calibration with DSpace June September? Waiting: Cal. Bench proto 2 Dspace system 100% Labview software 80% Select/ordering optical componants + mechanical mounting. comissioning Lab scanner: Qualifications with SCMS July-AugustFirmware startedComplete SCMS Prototype 2: Qualifications with SCMS SeptemberFirmware startedComplete SCMS Prototype 2: Calibration with SCMS OctoberLabview software 80%Complete SCMS Prototype 1 (SPS): Tests with SCMS NovemberInstall SCMS Prototype 1 (SPS): Qualifications with beam DecemberInstall SCMS + ACQ

Summary Electronics prototyping on-going to be ready for first beam test at the end of run 2015 More details will be given during next TB on the 2 nd of July Good laboratory setup for electronics and software design Prototype 2 needed to develop the calibration bench and evaluating the accuracy of the system BWS Electronics rack