1. LIU BWS Firmware status
J.Emery

2. LIU Wire scanner system architecture
BWS-FW1 Intelligent drive FPGA
BWS-FW3 Intelligent Drive Supervision FPGA
BWS-FW4 Multi-PMT acquisition FPGA
BWS-FW2 Inverter safety CPLD (very small FPGA)
Position (Resolver)
CPU
CTR V
VFC 1 HV 2
Power
Position (Optical)
Intelligent drive crate (IDC)
Acquisition & Supervision
Particles beam
Losses
Scintillator
PMT
LIU BWS firmware status - J.Emery

3. LIU BWS firmware status - J.Emery - 23.05.2019
Designation
Localization
Function
Performed tests
status
BWS-FW1
Intelligent drive Crate (IDC) -> Motion Controller Unit (MCU)
(VFC Board)
- Motion control - Mechanism sensors interface to Motor, Resolver, Optical encoder, Carbon Wire
Successful tests in the PS (2018)
Partial implementation
New revision on-going for the V3 of the hardware.
BWS-FW2
Intelligent Drive Crate (IDC) -> Motor Inverter Board (MIB)
Power management & safety function
Almost done, adapt to last hardware version
BWS-FW3
VME crate -> Intelligent Drive Supervision (IDS)
- Optical link to the Intelligent Drive - VME Interface to the crate CPU
Successful tests in the laboratory (2019)
Prototype working, iteration needed for new memory mapping.
BWS-FW4
VME crate -> Multi-PMT Acquisition (MPA) (VFC Board)
Four channels fast analog to digital conversion
Processing for data conditioning/reduction
VME Interface to the crate CPU
Test of a 2 CH version without processing in the PS (2018)
Waiting for final mezzanine
VME interface use version from BWS-FW3
Concept of the processing to be started
LIU BWS firmware status - J.Emery

4. LIU BWS firmware status - J.Emery - 23.05.2019
Firmware planning
Designation
July 2019
October 2019
December 2019
From February 2020
BWS-FW1
(IDC Motion control)
Interface to all HW I/O:
=> To launch HW production of the VFC mezzanine
Additional functions: - Multi-speeds motion controller
- Movement sequencer - DDR memory + optical interface to VME
Additional functions: - data driven scan inhibit
- LHC specific (if needed)
Intensive testing of final HW – FW - SW
BWS-FW2
(IDC Inverter)
Migration to HW V2
=> To launch HW prod of motor inverted board
done
BWS-FW3
(VME VFC, Supervision)
Update of the memory mapping to fit BWS-FW1
BWS-FW4
(VME VFC – FMC ADC)
Draft spec data processing
(Interface adaptation to the selected 4CH ADC mezzanine)
Detailed spec data processing & transfers cores tests for the processing
Tests of the 4CH ADC mezzanine memory mapping for SW
Test bench HW –FW to validate the firmware processing
LIU BWS firmware status - J.Emery

5. LIU BWS firmware status - J.Emery - 23.05.2019
Additional slides
LIU BWS firmware status - J.Emery

6. Electronics status report 15.04.2019
LIU BWS firmware status - J.Emery

7. Intelligent Drive Crate (IDC)
6U, ≈ 22Kg
EDA-03634
BWSMIB Motion Inverter Board EDA-03519
DC-BUS Capacitor
BWSMCU Motion Control Unit EDA-03697
Output filter “sinus”
BWSCPC Capacitor Power Charger EDA-03592
LIU BWS firmware status - J.Emery

8. BWSMIB - Motion Inverter Board - EDA-03519
Motor phases powering by chopping the DC-BUS (PWM control)
Design for the wire-scanner repetition rate (~every few sec.) To reduce size by 3 compared to off the shelf inverter
CPLD based digital interface and controls
Also replace DC-BUS control and measure card
SPI based interface, IGBT protection, faults signalisation, PWM generation (tbc)
Version 2 to the design office mid-February 2018
LIU BWS firmware status - J.Emery

9. Motion Control Unit (MCU)
EDA-03697
Motion Control Unit (MCU)
Incremental
Optical Position Sensor (IOPS)
Optical link to VME
Analog & Digital I/O
Connectors
to the scanner mechanism
VFC-HD - EDA-03133
BWSVPA - VME Power Adapter EDA-03698
Optical fibre components
BWSFHE - FMC-height-extender
EDA-03624
BWSAIF - Analog Interfaces FMC EDA-03096
LIU BWS firmware status - J.Emery
Connection to the power stage

10. LIU BWS firmware status - J.Emery - 23.05.2019
Motion Control Unit Mezzanine under tests – wire-scanner laboratory
LIU BWS firmware status - J.Emery

11. LIU BWS firmware status - J.Emery - 23.05.2019
Generic Protocol between BWS-FW1 and BWS-FW2 using GBT FPGA Optical Link
A generic Protocol using GBT FPGA, an IP core provided by CERN, to communicate through optical fibre
Designed for transparent accesses between Intelligent Drive and VME Interface / Software
Auto configured and includes Handshake mechanism to validate connection
Theoretical Bandwidth of Link :
GBT FPGA : (3.2Gbps / 400 MB/s)
GBT Protocol : (2.56Gbps / 320 MB/s)
LIU BWS firmware status - J.Emery

12. Movement sequencer for the Motion Control Unit
Firmware
Software
Wait for scan request (HPS or HWR)
Wait for user request
Reject request & Notify problem
Send end notification & condition and faults
Check conditions & faults
No ok
Write/read to VME address
Configure the scanner: INOUT time (max 1s) Other parameters (tbc)
Prepare system for movement 1. Configure system parameters 2. Turn on Drive
3. Turn on feedback Notify success of the preparation
Revert prepare
Write/read to VME address
~30ms (tbc) before the IN trigger send prepare
Check conditions & faults
No ok
read to VME address
End the movement feedback off
Verify if the prepare has been done
Wait for HWR trigger
Timeout
Poll VME address?
Wait for the end of movement
Success
Failed
Read range of VME address
Read the data space and store/display it
Scan procedure
LIU BWS electronics-software-inteface - J.Emery

13. BWS Secondary shower sensing acquisition chain using fast digitalizers
Up to ~230m
FPGA & On-board memory
Analog – digital board
Shielding
Copper cable
Single Scintillator
PMT 1
conditioning
Digitalization
Channel compensation
Local storage
Combination / selection /
Data reduction
Network storage (Logging)
Copper cable
PMT n
conditioning
Digitalization
Channel compensation
Similar sensor as today: Scintillator + PMT
Moving filters replaced by fixed filter and 4 PMTs
Signal digitalization at the surface using direct digitalization on VFC
Channel compensation, sensors combination and data reduction to be developed this year using field measurement (starting with scopes)
Take advantage of the FBCT experience with similar architecture
LIU BWS firmware status - J.Emery