CERN Rui de OliveiraTS-DEM TS-DEM Development of Electronic Modules Rui de Oliveira CERN State of the art technologies for front-end hybrids

CERN Rui de OliveiraTS-DEM Contents 1. Existing technologies 2. Pitch adaptors 3. Trends in future circuit materials 4. Cooling 5. Low mass 6. Buried components 7. Conclusions

CERN Rui de OliveiraTS-DEM 1. Existing technologies PCB Thick film hybrids HDI circuits / SBU / MCM/L (laminated) MCM/C (ceramic) Thin film hybrids MCM/D (deposited) Minimum line and space 120μm 90μm 75μm 50μm 25μm 20μm Mineral technologies Organic technologies

CERN Rui de OliveiraTS-DEM HDI Laser micro via process Cu N-1 Cu Glue Laser Copper Etching Dielectric Laser Ablation Plasma Cleaning Metallization dielectric

CERN Rui de OliveiraTS-DEM 2. Pitch adaptors Use a denser technology? Introduce a thin film pitch adaptor?  delicate assembly Build the pitch adaptor in MCM/D?  not cost effective in many cases because the whole circuit will be produced with a high density technology State of the art in HDI Hybrids: Minimum line and space 40 to 75 μm  80 to 150 μm pitch 45 μm pitch is often required to connect front end chips This fine pitch is not needed in the whole circuit Split the dense area in multi layers in MCM/C or HDI

Pitch adaptor technologies Pitch adaptor Al on Glass Minimum line and space: 15 μm one layer Minimum pitch: 30 μm Pitch adaptor on thick film Hybrid Minimum line and space: 40 μm 2 or more layers Minimum pitch: 25 μm (3 layers) Pitch adaptor on HDI Minimum line and space: 40 μm 2 layers Minimum pitch: 40 μm (2 layers)

CERN Rui de OliveiraTS-DEM Advantages of HDI built in pitch adaptors Reduced cost Already in the circuit: no need for post assembly Thin thicknesses: down to 100 μm Low Dk and low loss materials Any shape is possible: not limited to parallelograms like in Thin film or Thick film Larger bonding pads

CERN Rui de OliveiraTS-DEM 3. Trends in future circuit materials Board manufacturability ReliabilityEnvironmental friendly FunctionalityMiniaturization Process compatibility Registration Drilling compatibility Low CTE Fillers High TG CAF-resistant Halogen free Lead Free Low Dk Low Df Embedded Metal core CAF: conductive anodic filament

CERN Rui de OliveiraTS-DEM Commonly used dielectrics Glass epoxy: FR4, Halogen free, High Tg, Z CTE control, low Df, CAF resistant RCC: “Resin coated copper” Polyaramid/epoxy: Thermount, kevlar epoxy Glass polyimide Polyimide LCP (liquid crystal polymer) PTFE: pure, PTFE fiber + epoxy, Glass fiber + PTFE

CERN Rui de OliveiraTS-DEM 4. Cooling CTE [Ppm/deg C] Thermal conductivity [W/m.deg C] ProcessPrice CIC5170easiestlow Aluminium22220easylow Al/ Si easymedium Carbon fibre2Up to 1000/z 10difficultmedium Carbon carbon2600/z 300difficulthigh PG0600/z 8difficulthigh TPG01600/z 8very difficultvery high Alumina722easylow Berylia8300easyhigh AlN difficultmedium

CERN Rui de OliveiraTS-DEM Possible structures Buried: CIC, Aluminium and ceramics (Thick film) Glued to the circuit: all of them For better reliability: –CTE close to Silicon (from 2 to 10 ppm) –Be careful with non-isotropic CTE or high-CTE materials –Use of high-TG materials –Use of elastic glues with big CTE mismatch –Be careful with adhesion to carbon structures

Thermal simulation LHCb PS/SPD CERN TS/CV Computational Fluid Dynamics team Tools: Flotherm Star CD

CERN Rui de OliveiraTS-DEM 5. Low mass MaterialRadiation length [cm] Density [gr/cc] Resistivity [uohms*cm] Aluminium Copper Beryllium Gold Glass epoxy 19.4 Polyimide 29.0 Copper is close to 6.5 times less transparent than aluminum Aluminum has only 1.6 times the resistivity of copper Polyimide is 1.5 times better than glass epoxy

Alice Pixel Bus PIXEL BUS MCM Signals1 VDD GND Pixel readout chip Pixel detector Signals2 Signals3 GND VDD Signals1 Signals3 Signals2 3 signal layers and a staircase shaped side

CERN Rui de OliveiraTS-DEM Aluminium bus details Aluminium bus for Alice Pixel detector Size: 160 mm x 16 mm Working support Thick Cu (300 μm) Chemically removed after finalisation of circuit

CERN Rui de OliveiraTS-DEM Aluminium Micro-vias Process Al Cu Polyimide Glue Copper Etching Dielectric Etching Anisotropic Glue Etching Metallization Copper etching Vacuum Al deposition

CERN Rui de OliveiraTS-DEM 12 microns vacuum deposited aluminium Bonding close-up view

CERN Rui de OliveiraTS-DEM 6. Buried components Resistors Capacitors Active devices

CERN Rui de OliveiraTS-DEM Buried resistors: “Omega ply” or “Gould TCR” Integrated resistor benefits Increases density, no via, no solder joints Reduce PCB assembly Improves impedance matching Reduces series inductance Reduces crosstalk and noise Resistor value and stability Better than ± 10% Laser trimmable down to ±1% Stability : -20, 100 or 200 ppm Drawbacks Few suppliers and manufacturers No resistor change possible after layout Resistor values limited (25 to 250 ohms/square)

CERN Rui de OliveiraTS-DEM Buried capacitors Thin dielectrics – conventional thickness of 55 μm reduced to 10 μm –dielectric loaded with particles of ceramic or barium compounds Dielectric constant –ZBC2000™ (Sanmina Corp): 4.0 –BC16T (OAK-MITSUI): 30 Value – 155pF to 1.7nF/cm 2

CERN Rui de OliveiraTS-DEM Buried active devices Technology thin chips (50 μm or thinner) embedded in RCC layer thickness = 70 –100 μm Contact to the chip by laser microvia and Cu metallisation on chip Challenges Process control (die bond thickness) Contact to the chip “large area” processing Reliability Multilayer Build-up

CERN Rui de OliveiraTS-DEM 7. Conclusions HDI technology is currently the best candidate for HEP front end electronics It is possible to boost this technology in local areas A lot of dielectric materials exist but not all companies have the know how Thermal management: simulate! HDI low mass: limited number of producers, CERN is ready for small to medium volumes Buried passive components is a real possibility in the near future. Buried active further away (is there a real need in HEP?)