The Silicon Vertex Detector of the Belle II Experiment

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Presentation transcript:

The Silicon Vertex Detector of the Belle II Experiment Thomas Bergauer (HEPHY Vienna) 12th Pisa Meeting on Advanced Detectors 24. May 2012

Belle and Belle II DEPFET Pixel Detector Double-sided Strip Detector Summary 24. May 2012 Thomas Bergauer

KEKB and Belle @ KEK (1999-2010) ~1 km in diameter KEKB Belle Linac About 60km northeast of Tokyo Asymmetric machine: 8 GeV e- on 3.5 GeV e+ Linac Belle KEKB Center of mass energy: Y(4S) (10.58 GeV) High intensity beams (1.6 A & 1.3 A) Integrated luminosity of 1 ab-1 recorded in total Belle mentioned explicitly in 2008 Physics Nobel Prize announcement to Kobayashi and Maskawa 24. May 2012 Thomas Bergauer

Belle Detector (1999–2010) Si vertex detector 4 layers DSSD Aerogel Cherenkov counter n=1.015~1.030 SC solenoid 1.5 T 3.5 GeV e+ CsI(Tl) 16 X0 TOF counter 8 GeV e- Central Drift Chamber small cell +He/C2H5 Si vertex detector 4 layers DSSD µ / KL detection 14/15 lyr. RPC+Fe 24. May 2012 Thomas Bergauer

SuperKEKB/Belle II Upgrade: 2010–2015 Aim: super-high luminosity ~81035 cm-2s-1  11010 BB / year LoI published in 2004; TDR published in 2010 Refurbishment of accelerator and detector required nano-beams with cross-sections of ~10 µm x 60 nm 10 mm radius beam pipe at interaction region http://belle2.kek.jp 24. May 2012 Thomas Bergauer

Previous SVD Layout (until 2010) 4 straight layers of 4" double-sided silicon detectors (DSSDs) Outer radius of r~8.8 cm Up to three 4” sensors are daisy- chained and read out by one hybrid located outside of acceptance region (VA1 chip) 24. May 2012 Thomas Bergauer

Belle Silicon Vertex Detector (SVD) Previous SVD limitations were occupancy (currently ~10% in innermost layer)  need faster shaping dead time (currently ~3%)  need faster readout and pipeline Belle II needs detector with high background tolerance pipelined readout robust tracking low material budget in active volume Current SVD is not suitable for Belle II 24. May 2012 Thomas Bergauer

New Layout for Belle II SVD (2014-) 4 layers of double-sided strip sensors Two layers of DEPFET pixels New double-layer pixel detector using DEPFET technology Four layers with 6” double-sided strip detectors and forward part optimized for precision vertex reconstruction of the decays of short-lived B-mesons 24. May 2012 Thomas Bergauer

Belle and Belle II DEPFET Pixel Detector Double-sided Strip Detector Summary DEPFET PXD Posters: Ultra-thin fully depleted DEPFET active pixel sensors for future e+/e- colliders– C. Koffmane The DEPFET Active Pixels for Belle II - Resolution in 50 micron thinned Sensor – P. Kodys 24. May 2012 Thomas Bergauer

The DEPFET Belle-II PXD Two layers mounted onto beam-pipe Angular coverage 17°<θ < 155° material budget below 0.5 % X0 low power density of 0.1 W/cm2 background occupancy to 1 - 3 % z vertex resolution significantly improved (PXD & SVD) compared to Belle-I Inner layer Outer layer # ladders 8 12 Sens. length 90 mm 123 mm Radius 1.4 cm 2.2 cm Pixel size 50x50 µm2 50x75 µm2 # pixels 1600(z)x250(R-ɸ) Thickness 75 µm Frame/row rate 50 kHz/10 MHz Slide 1 on the PXD: ladder concept, number of pixels, Material budget, Improved vertex resolution PXD & SVD 24. May 2012 Thomas Bergauer

Self Supporting All-Silicon Module 3D Model of Belle-II Ladder Photo of thinned backside Material Budget Distribution: Slide 3 on the PXD – 3D model and photo of a 75µm thin example - Mounting on beam pipe – endflange are cooled with CO2 0.19 %X0 in total 24. May 2012 Thomas Bergauer

DEPFET Sensors DEPFET = depleted p-channel field effect transistor Fully depleted sensitive volume Charge collection in the “off” state, read out on demand Modulation of the FET current by the charge in the internal gate Clear contact to empty the internal gate Slide 4 on the PXD – DEPFET Principle 24. May 2012 Thomas Bergauer

PXD Module Read-out Switcher devices control the GATE and CLEAR (reset) lines DCD (Drain Current Digitizer) is the readout chip with A/D converters DHP (Digital Handling Processor) chips - first-stage preprocessing and data reduction Belle II PXD produces huge data streams: raw 180 GB/s (20 PXD ladders, 8M pixels in total, occupancy up to 3%, trigger rate of 30kHz) Data reduction necessary Slide 4 on the PXD – DEPFET Principle and Module Read-out with the remark on the huge data stream 24. May 2012 Thomas Bergauer

DEPFET/DCD-B Test System Switcher-B for Clear and Gate Control DCD-B Read-out Chip DCD-RO Line Driver and Buffer to FPGA PXD6 Belle-II DEPFET Matrix 32x64 Pixels L = 6 µm Pixel Size 50 x 50 µm² Thickness 50 µm Slide 5 on the PXD: Test System of PXD Prototypes with the ASICs as planned for Belle II One result from one of the last beam test (has to be selected) 2nd Switcher-B Not used for Belle-II type PXD6 Design 320 MHz DCD-B clock  100 ns signal processing time per row Residuals distribution for perpendicular tracks with single pixel response (1) and more than 1 pixel response (2), σ=12 µm 24. May 2012 Thomas Bergauer

DAQ system of Belle II PXD From DHP to DHH (Data Handling Hybrid) via 15m line: kapton converted to twisted-pair in a passive patch panel DHHs via optical links to ATCA Compute Nodes ATCA CNs reduce data based on triggers ATCA CNs compute fast tracking using SVD data to quickly identify regions of interest in the PXD Slide 6 on the PXD DAQ system for Belle II (hardware description) Link between SVD and PXD in the ATCA CN 24. May 2012 Thomas Bergauer

Belle and Belle II DEPFET Pixel Detector Double-sided Strip Detector Summary 24. May 2012 Thomas Bergauer

SVD Configuration Outermost layers 4-6 with slanted forward part (trapezoidal sensors) Layer 3 with straight ladders: mechanics still under discussion Sensors need to be read out individually (no daisy-chaining) High background -> fast shaping time to keep occupancy low -> high noise -> short strips However, very low material budget necessary 24. May 2012 Thomas Bergauer

Double-sided strip sensors from 6” wafer Double sided strip silicon detectors with AC-coupled readout and poly-silicon resistor biasing made of 6 inch wafers Size 12 x 6 cm After market survey, prototypes ordered and delivered from Hamamatsu (rectangular) Micron (trapezoidal) 24. May 2012 Thomas Bergauer

Trapezoidal Sensors for Forward Region Trapezoidal sensor for forward region Different p-stop layouts on test sensors Atoll p-stop Common p-stop Combined p-stop 24. May 2012 Thomas Bergauer

Modules for Beam Test Baby Modules used to verify p-stop layouts and geometries Trapezoidal Module Baby Module 24. May 2012 Thomas Bergauer

Stack Setup Two sensors for tracking (p-side) 120 GeV hadrons (mostly π) One module just for balance Three DUTs, one of each p-stop pattern (n-side) 24. May 2012 Thomas Bergauer

Signal-to-noise-ratios Test sensors have been Gamma-irradiated with Co-60 (70 Mrad) Tested before and after at CERN beam test (120 GeV hadrons) Dark colors: non-irradiated, Light colors: irradiated Four geometries: width of „virtual“ strip defined by p-stop Atoll pattern (half-wide) performs best, both irradiated and non-irradiated Chosen for final sensor 24. May 2012 Thomas Bergauer

Eta Distributions for Atoll p-Stop Charge accumulation in unimplanted region 24. May 2012 Thomas Bergauer

Readout System Concept Analog data transmission up to FADC by copper cable Signal conditioning using FIR (Finite Impulse Response) filter Prototype readout system exists Verified in several beam tests Needs to be adapted for higher integration (chips/boards) 1748 APV25 chips Front-end hybrids Rad-hard DC/DC converters Analog level translation, data sparsification and hit time reconstruction Unified Belle II DAQ system ~2m copper cable Junction box ~10m copper cable FADC+PROC Unified optical data link (>20m) COPPER 24. May 2012 Thomas Bergauer

Prototypes 4A DC/DC converter prototype (developed at CERN) FADC+PROC (9U VME) Digitization, zero-suppression, hit time reconstruction 24. May 2012 Thomas Bergauer

Readout Chip: APV25 Developed for CMS (LHC) by Imperial College London and Rutherford Appleton Lab 70.000 chips installed 0.25 µm CMOS process (>100 MRad tolerant) 128 channels 192 cell analog pipeline  no dead time 50 ns shaping time  low occupancy Multi-peak mode (read out several samples along shaping curve) Noise: 250 e + 36 e/pF  must minimize capacitive load!!! Thinning to 100µm successful 24. May 2012 Thomas Bergauer

APV25 – Hit Time Reconstruction Possibility of recording multiple samples (x) along shaped waveform (feature of APV25) Reconstruction of peak time (and amplitude) by waveform fit Offline now Hardware later Is used to remove off-time background hits Measurement 24. May 2012 Thomas Bergauer

Occupancy Reduction Belle -> Belle II 24. May 2012 Thomas Bergauer

Chip-on-Sensor Concept Chip-on-sensor concept for double-sided readout Flex fan-out pieces wrapped to opposite side (hence “Origami“) All chips aligned on one side  single cooling pipe Side View (below) 24. May 2012 Thomas Bergauer

Origami Module Assembly Ingredients: DSSD sensors Kapton PCB and pitch-adapters APV Readout chips Followed by complicated assembly procedure currently verified by all groups interested in ladder assembly 24. May 2012 Thomas Bergauer

Origami Module with 6” HPK DSSD 24. May 2012 Thomas Bergauer

Sketch of the Outermost Ladder (Layer 6) Composed of 5 x 6” double-sided sensors Center sensors have Origami structure Averaged material budget over the full module: 0.55% X0 ca. 60cm 24. May 2012 Thomas Bergauer

Ladder Mechanics Carried by ribs made of carbon fiber and Airex foam CO2 Cooling Pipe Sensor Carried by ribs made of carbon fiber and Airex foam Very stiff, yet lightweight thanks to the sandwich construction Support Ribs 24. May 2012 Thomas Bergauer

Belle and Belle II DEPFET Pixel Detector Double-sided Strip Detector Summary 24. May 2012 Thomas Bergauer

Summary KEKB is the highest luminosity machine in the world Upgrade of KEKB and Belle (2010-2015) 40-fold increase in luminosity Needs upgrades of all sub-detectors New, enlarged Silicon Vertex Detector Two layers of DEPFET pixels Four double-sided strip layers Strip Detector R&D 6 inch Double Sided Strip Detectors Optimal p-stop geometry identified by SNR measurements before and after irradiation Readout with hit time reconstruction for improved background tolerance Origami chip-on-sensor concept for low-mass DSSD readout 24. May 2012 Thomas Bergauer

Advertisment http://vci.hephy.at 24. May 2012 Thomas Bergauer

The End. Backup Slides follow 24. May 2012 Thomas Bergauer

Beam Parameters KEKB Design KEKB Achieved : with crab SuperKEKB High-Current SuperKEKB Nano-Beam Energy (GeV) (LER/HER) 3.5/8.0 4.0/7.0 by* (mm) 10/10 5.9/5.9 3/6 0.27/0.42 ex (nm) 18/18 18/24 24/18 3.2/2.4 sy(mm) 1.9 0.94 0.85/0.73 0.059 xy 0.052 0.129/0.090 0.3/0.51 0.09/0.09 sz (mm) 4 ~ 6 5/3 6/5 Ibeam (A) 2.6/1.1 1.64/1.19 9.4/4.1 3.6/2.6 Nbunches 5000 1584 2503 Luminosity (1034 cm-2 s-1) 1 2.11 53 80

KEKB accelerator upgrade Crab cavity 3.5GeV e+ 8GeV e- New beam-pipes with ante-chamber Damping ring for e+ New IR with crab crossing and smaller by* More RF for higher beam current SR beam 24. May 2012 Thomas Bergauer

Belle-II New dead-time-free pipelined readout and high speed Faster calorimeter with waveform sampling and pure CsI (endcap) New particle identifier with precise Cherenkov device: (i)TOP or fDIRC. Endcap: Aerogel RICH KL/m detection with scintillator and next generation photon sensors Background tolerant super small cell tracking detector Si vertex detector with high background tolerance (+2 layers, pixels) New dead-time-free pipelined readout and high speed computing systems 24. May 2012 Thomas Bergauer

Spatial Resolution of the Belle II Detector MC simulation for 50 and 75 mm thick silicon: intrinsic resolution in R-F and Z Extensive simulation study (ILC software framework): To determine the expected Belle II PXD resolution Cluster sizes A/D conversion Signal processing Impact parameter Vertex resolutions 75 mm thick silicon in R-F 50 mm thick silicon in R-F better resolution Slide 2 on the PXD – MC simulation to define the thickness of the DEPFET sensor 75 mm thick silicon in Z 50 mm thick silicon in Z shift of the best resolution to 50 deg 24. May 2012 Thomas Bergauer

Sensor Types and Vendors Layer # of Ladders Rect. Sensors [narrow] [wide] Wedge Sensors APVs 6 16 64 800 5 12 36 480 4 10 20 300 3 7 14 168 Sum: 49 120 38 1748 24. May 2012 Thomas Bergauer

Current Barrel Layout Origami Cooling Tubes Slanted Sensors Layer Sensors/ Ladder Origamis/ Ladders Length [mm] Radius [mm] Slant Angle [°] 3 2 7 262 38 4 1 10 390 80 11.9 5 12 515 105 16 6 645 135 21.1 Origami Cooling Tubes Slanted Sensors Hybrid Boards 24. May 2012 Thomas Bergauer

Comparison VA1TA – APV25 VA1TA (SVD) Commercial product (IDEAS) Tp = 800ns (300 ns – 1000 ns) no pipeline <10 MHz readout 20 Mrad radiation tolerance noise: ENC = 180 e + 7.5 e/pF time over threshold: ~2000 ns single sample per trigger APV25 (Belle-II SVD) Developed for CMS by IC London and RAL Tp = 50 ns (30 ns – 200 ns) 192 cells analog pipeline 40 MHz readout >100 Mrad radiation tolerance noise: ENC = 250 e + 36 e/pF time over threshold: ~160 ns multiple samples per trigger possible (Multi-Peak-Mode) 24. May 2012 Thomas Bergauer

Measured Hit Time Precision Results achieved in beam tests with several different types of Belle DSSD prototype modules (covering a broad range of SNR) 2...3 ns RMS accuracy at typical cluster SNR (15...25) Working on implementation in FPGA (using lookup tables) – simulation successful (TDC error subtracted) Origami Module 24. May 2012 Thomas Bergauer

Finite Impulse Response (FIR) Filter Optimized channel Non-optimized channel Raw APV25 output without FIR FIR filter with 8 coefficients Convolution (16-bit multiplications & sum) of incoming data at 40MHz 24. May 2012 Thomas Bergauer

Maximum Radiation Length Distribution APV Kapton Pipe Coolant Sensor CFRP Airex 24. May 2012 Thomas Bergauer

Cooling Boundary Conditions Power dissipation per APV: 0.40 W 1 Origami sensor features 10 APVs Origamis/Ladder Ladders # APVs Origami # APVs Hybrid Power/ Layer [W] Power Origami [W] Layer 6 3 16 480 320 192 Layer 5 2 14 240 96 Layer 4 1 10 100 200 120 40 Layer 3 7 140 56 Sum 47 820 900 688 328 Total Origami power dissipation: 328 W 360 W dissipated at the hybrid boards Total SVD power dissipation: 688 W 24. May 2012 Thomas Bergauer

CO2 Cooling Closed CO2 cooling plant under development Collaboration with CERN First step is to gain experience with open (blow) system Control cabinet with touch screen Accumulator Liquid pumps 1.3 m 1.6 m 1.2 m 24. May 2012 Thomas Bergauer