Solid State Devices Fall 2011 Thermal Oxidation of Silicon Chapter 3

Thermal Oxidation of Silicon Silicon Dioxide High quality electrical insulator (used for gate and field oxide in MOSFETs) Diffusion/implantation barrier (used to define source and drain in MOSFETs) Passivates silicon surface

Thermal Oxidation Fick’s First Law of Diffusion NOTE: we will derive this equation later

Thermal Oxidation Fick’s First Law of Diffusion

Thermal Oxidation Oxidation Theory (exact equations) Oxide growth occurs at Xo The coefficients B/A and B are defined and explained on the next 3 slides NOTE: The equations above are derived in the Appendix of these slides

Linear and Parabolic Rate Constants for Wet and Dry Oxidation B/A (linear rate constant) and B (parabolic rate constant) also follow an Arrhenius relationship: = Doexp(-EA/kT) Wet oxidation is much more rapid than dry oxidation Note that dry oxidation appears to always have some initial oxide present Dry oxidation (slow) produces higher quality oxide than wet oxidation (Arrhenius relationship results in a straight line when plotted on a semilog scale as a function of 1/T)

Oxidation Theory Parabolic Regime (approximate equation for long times)

Oxidation Theory Linear Regime (approximate equation for short times)

Thermal Oxidation on <100> Silicon B/A has different values for different crystal planes. B and B/A are different for dry and wet oxygen Xi ~ 0 gives good agreement for wet oxidation; Xi ~ 0.025 µm gives good agreement with experiment for dry oxidations For “bare” wafers.

Thermal Oxidation on <111> Silicon B/A has different values for different crystal planes. B and B/A are different for dry and wet oxygen

Thermal Oxidation Example

Thermal Oxidation Example A <100> silicon wafer has a 2000-Å oxide on its surface (a) How long did it take to grow this oxide at 1100o C in dry oxygen? (b)The wafer is put back in the furnace in wet oxygen at 1000o C. How long will it take to grow an additional 3000 Å of oxide?

Thermal Oxidation Example Graphical Solution (a) According to Fig. 3.6, it would take 2.8 hr to grow 0.2 mm oxide in dry oxygen at 1100o C. (b) The total oxide thickness at the end of the oxidation would be 0.5 mm which would require 1.5 hr to grow if there was no oxide on the surface to begin with. However, the wafer “thinks” it has already been in the furnace 0.4 hr. Thus the additional time needed to grow the 0.3 mm oxide is 1.5-0.4 = 1.1 hr.

Thermal Oxidation Example Mathematical Solution (200 nm, dry oxygen) and B, B/A = Doexp(-EA/kT)

Thermal Oxidation Example Mathematical Solution (additional 300 nm, wet oxygen) and B, B/A = Doexp(-EA/kT)

Thermal Oxide Thickness and Time Calculations Convert temperature to degrees K Use appropriate B and B/A values from Table 3.1 Use the appropriate values for the activation energy --is the process wet or dry? --is the wafer <100> or <111>? if there is existing oxide, calculate t from Xi Check your answers with Fig. 3.6 or 3.7 as appropriate

Visual Oxide Thickness Determination Oxide Color Chart Ellipsometer - direct measurement

Thermal Oxidation Wet High Pressure Oxidation

Masking Properties of SiO2 Required oxide thickness depends upon dopant species and temperature Hydrogen greatly enhances diffusion of boron - wet oxidation release hydrogen The first oxide layer on your wafer masks boron from diffusing everywhere except in the source and drain regions

Masking Properties of SiO2, cont’d Original SiO2 layer is an effective mask until the mixed glass layer reaches the SiO2/Si interface Diffusivities of B, P, As and Sb are orders of magnitude slower in SiO2 than in Si

Thermal Oxide Quality Dry oxidation (slow) produces higher quality oxide than wet oxidation Oxidations often consist of a sequence of dry-wet-dry oxidation cycles Dry phase yields higher density oxide with improved breakdown voltage (5-10 MV/cm) Dry oxidation usually used to grow gate oxides Nitrogen is added to form oxynitrides for very thin gate oxides

Thermal Oxidation Systems Figure 3.11 Furnaces used for oxidation and diffusion (a) A three-tube horizontal furnace with multizone temperature control (b) Vertical furnace (Courtesy of Crystec, Inc.) (b)

Local Oxidation of Silicon (LOCOS) Isolation technology in MOS processes Provides isolation between nearby devices Fully recessed process attempts to minimize bird’s beak

Thermal Oxidation Deep Trench Isolation Often used in dynamic memory chips (DRAMS) Deep trenches used in high performance bipolar processes

Thermal Oxidation Example of Deep Trenches Filled Trenches

Thermal Oxidation Shallow Trench Isolation Used for isolation between devices and to minimize device capacitance

Chemical Mechanical Polishing (CMP) Mechanical polishing is widely used to achieve highly planar surfaces Used in multilevel metalization systems including both aluminum and copper

Thermal Oxidation Trench Isolation Example Shallow trench isolation CMP planarization Deep trench isolation Figure 3.14 Microphotograph of actual deep and shallow trench isolation applied to SiGE HBT technology. Copyright 1998 IEEE. Reprinted with permission from Ref. [31].

Multilevel Metallization Using CMP 6 5 4 3 2 1 Tungsten Figure 3.16 Multilevel metallization fabricated with chemical mechanical polishing (a) SEM of 6-level thin-wire copper. First-level copper is connected with tungsten studs to tungsten local interconnect. (b) SEM of 6-level copper with low RC metallization on levels 5 and 6. Copyright 1997 IEEE. Reprinted with permission from Ref. [24].

Process Simulation SUPREM Oxidation Example Stanford University Process Engineering Modeling Program [25-27]

Dopant Redistribution at the SiO2/Si Interface Thermal oxidation occurs over doped Si (ex: As for n-type and B for p-type) Doped Si is consumed during growth of oxide Dopants near the interface are redistributed during the growth process depending on --the diffusion coefficient of the dopant in SiO2 (fast or slow) --the segregation coefficient (m) of the impurity where equilibrium concentration of impurity in Si equilibrium concentration of impurity in SiO2 m = m < 1 impurity would rather be in SiO2than Si m >1 impurity would rather be in Si than SiO2

Thermal Oxidation Dopant Redistribution

Thermal SiO2 with Impurities Pure crytalline SiO2 is a 3D network of polyhedra with Si (quartz) Atoms surrounded by 4 O atoms Thermal oxide is amorphorous, random network of polyhedra

Impurities in SiO2 Films Impurities can greatly modify properties of SiO2 Substitutional impurities (B or P replace Si) --makes oxide difficult to etch --”network former” Interstitial impurities modify the network (Na) --”network modifiers” weaken SiO2 Density of crystalline SiO2 is 2.5 g/cm3 Density of thermal oxide: 2.15 to 2.25 g/cm3

Thermal Oxidation References

Appendix: Derivation of Thermal Oxide Equations

Derivation of thermal Oxide Thickness Equation

Thermal Oxide Derivation, cont’d 2

Thermal Oxide Derivation, cont’d 3

Thermal Oxide Derivation, cont’d 4

Thermal Oxide Derivation, cont’d 5

Thermal Oxide Derivation, cont’d 6

Thermal Oxide Derivation, cont’d 6

Thermal Oxide Derivation, cont’d 7

Thermal Oxide Derivation, cont’d 8

Comments on B and B/A

Comments on B and B/A, cont’d 1

Comments on B and B/A, cont’d 2

Comments on B and B/A, cont’d 3

Comments on B and B/A, cont’d 4

End of Thermal Oxidation Slides