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For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201- 44494-1. © 2002.

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Presentation on theme: "For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201- 44494-1. © 2002."— Presentation transcript:

1 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201- 44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Introduction to Microelectronic Fabrication by Richard C. Jaeger Distinguished University Professor ECE Department Auburn University Chapter 7 Interconnections and Contacts

2 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Copyright Notice © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1.

3 © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections and Contacts MOS Logic Circuit 3 Basic Interconnection Levels –n + diffusion –Polysilicon –Aluminum Metallization Contacts –Al-n + –Al-Polysilicon –Al-p Substrate Contact Not Shown Figure 7.1 Portion of MOS integrated circuit (a) Top view (b) Cross section

4 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Resistivity of Metals Commonly Used Metals Aluminum Titanium Tungsten Copper Less Frequently Utilized Nickel Platinum Paladium

5 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Contacts Ohmic Contact Formation (a) Ideal Ohmic Contact (b) Rectifying Contact (similar to diode) (c) Practical Nonlinear “Ohmic” Contact

6 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Contacts Ohmic Contact Formation Figure 7.3 Aluminum to p-type silicon forms an ohmic contact similar to Fig. 7.2(a) [Remember Al is p-type dopant] Aluminum to n-type silicon can form a rectifying contact (Schottky barrier diode) similar to Fig. 7.3(b) Aluminum to n+ silicon yields a contact similar to Fig. 7.3c Figure 7.2

7 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Contacts Aluminum-Silicon Phase Diagram Aluminum-Silicon Eutectic Point 577 o C

8 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Contacts Aluminum Spiking and Junction Penetration Silicon absorption into the aluminum results in aluminum spikes Spikes can short junctions or cause excess leakage Barrier metal deposited prior to metallization Sputter deposition of Al - 1% Si

9 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Contacts Alloying of Contacts

10 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Contacts Contact Resistance

11 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Electromigration (a) (b) High current density causes voids to form in interconnections “Electron wind” causes movement of metal atoms

12 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Electromigration Copper added to aluminum to improve lifetime (Al, 4% Cu, 1% Si) Heavier metals (e. g. Cu) have lower activation energy

13 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Diffused Interconnections n- and p-type diffusions can be used for local interconnections pn-junction diode must be kept in its reverse-biased (non- conducting) state All interconnections have a series resistance R and shunt capacitance C per unit length The RC time constant limits operating frequency n + and polysilicon lines R S ≥ 30  /square Figure 7.9 Lumped RC model for a small section of an n+ diffusion

14 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Diffused Interconnection Diffused interconnection in NMOS OR gate. Merged source and drain regions used to interconnect devices Multiple contacts used to reduce overall contact resistance Figure 7.10

15 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Buried and Butted Contacts Techniques for interconnecting polysilicon and n+ diffusion (a)Standard metal level link (b)Buried contact with polysilicon in contact with diffusion (requires additional mask step to place n + under polysilicon (c)Butted contact with aluminum overlap Figure 7.11

16 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Silicides/Polycides/Salicides Silicides of noble and refractory metals can be used to reduce sheet resistance of polisilicon and diffused interconnections Provide shunting layer in parallel with original inteconnection Figure 7.12

17 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Properties of Various Silicides

18 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Salicide Self-Aligned Silicide on silicon and polysilicon Often termed “Salicide”

19 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Contacts Silicide Contacts in Devices

20 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Liftoff Process (a) Subtractive etching process (b) Additive metal liftoff process Figure 7.15

21 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Multilevel Metallization Two level metal processes Silicon dioxide, polyimide or silicon nitride dielectrics Vias formed to connect between metal levels Vias can be filled (b)to improve planarization Figure 7.16

22 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Multilevel Metallization Example of multilevel aluminum metallization with tungsten via plugs Planarity achieved through Chemical Mechanical Polishing (CMP) Figure 7.17 Multilevel aluminum metallization with tungsten plugs. Copyright 1998 IEEE. Reprinted with permission from Ref. [7]. Al

23 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Plated Copper Copper deposited using “standard” plating processes adapted to microelectronics Seed layer deposited Mask layer deposited and patterned Copper plated up Mask layer removed Seed layer etched away

24 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Copper Damascene Process Damascene process used to obtain highly planar surfaces Dielectric layer (insulator) deposited and patterned Seed layer deposited Copper plated Surface polished mechanical & chemical

25 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Dual Damascene Process

26 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections Dual Damascene Process (cont.)

27 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Multilevel Metallization Examples Figure 7.20 (a) Dual Damascene copper combined with aluminum- copper and tungsten plugs on the lower levels. Copyright 1997 IEEE. Reprinted with permission from Ref. [6]. (b) Dual Damsascene Copper. Courtesy of Motorola Inc. Note planarity of both structures. (a) (b)

28 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201-44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. Interconnections and Contacts References

29 For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN0-201- 44494-1. © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is protected under all copyright laws as they currently exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher. End of Chapter 7


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