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Solid State Devices EE 3311 SMU

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Presentation on theme: "Solid State Devices EE 3311 SMU"— Presentation transcript:

1 Solid State Devices EE 3311 SMU
Chapter 4 Diffusion of Dopants Revised September, 2015

2 Impurity Diffusion Diffusion in Semiconductors
a process that allows atoms to move within a solid at elevated temperatures takes place in a concentration gradient atoms move in direction of decreasing concentration changes type (n or p) of carrier changes the conductivity Diffusion Mechanisms Substitutional Interstitial

3 Point Defects & Doping Self Interstitial Vacancy Substutional

4 Diffusion Process T ~ 900 to 1100C (Si)
Dopants spread vertically and laterally

5 3D View of Diffusion

6 Constant Source Diffusion

7 Drive-in Diffusion

8 Diffusion Fick’s First Law
Units: D (cm2/sec); DN (particles/cm3); Dx (cm); so J (particles/cm2/sec)

9 Diffusion Fick’s Second Law

10 Constant Source Diffusion Solution Complementary Error Function Profiles

11 Constant Source Math Details

12 Constant Source Math Details, cont’d 1

13 Constant Source Math Details, cont’d 2

14 Constant Source Math Details, cont’d 3

15 Constant Source Math Details, cont’d 4

16 Limited Source Diffusion Solution Gaussian Profiles
Initial Impulse with Dose Q

17 Limited Source Math Details

18 Limited Source Math Details, cont’d 1

19 Limited Source Math Details, cont’d 2

20 Two Step Diffusion

21 Diffusion Profile Comparison
Complementary Error Function and Gaussian Profiles are Similar in Shape

22 Diffusion Coefficients
Substitutional Diffusers Interstitial Diffusers

23 Diffusion Coefficients
limited source constant source

24 Successive Diffusions
Successive Diffusions Using Different Times and Temperatures Final Result Depends Upon the Total Dt Product

25 Diffusion Solid Solubility Limits
There is a limit to the amount of a given impurity that can be “dissolved” in silicon (the Solid Solubility Limit) At high concentrations, all of the impurities introduced into silicon will not be electrically active

26 Point Defects & Doping Self Interstitial Vacancy Substutional

27 Diffusion p-n Junction Formation

28 Junction Depth of Limited Source Diffusion

29 Junction Depth of Constant Source Diffusion
And the junction xj occurs at

30 Resistivity vs. Doping For EE 3311, wafer resistivities range from ~ 1 to ~ 10 ohm-cm Implies NB ~ 4x1014 to 4.5x1015 atoms/cm3

31 Two Step Diffusion Short constant source diffusion used to establish dose Q (“Predep” step) Longer limited source diffusion drives profile in to desired depth (“drive in” step) Final profile is Gaussian

32 Diffusion Calculation Example 4.3 - Boron Diffusion
A boron diffusion is used to form the base region of an npn transistor in a 0.18 W-cm n-type silicon wafer. A solid-solubility-limited boron predeposition is performed at 900o C for 15 min followed by a 5-hr drive-in at 1100oC. Find the surface concentration and junction depth (a) after the predep step and (b) after the drive-in step.

33 Diffusion Calculation, cont’d 1 Boron Diffusion: Constant Source
constant source/pre-deposition:

34 Diffusion Calculation, cont’d 2 Boron Diffusion: Limited Source
limited source/drive-in:

35 Diffusion Calculation, cont’d 4 Wafer Background Doping

36 Diffusion Calculation, cont’d 3 Junction Depths

37 Diffusion Calculation, cont’d 5 Calculated profiles
Short constant source diffusion used to establish dose Q (“Predep” step) Longer limited source diffusion drives profile in to desired depth (“drive in” step) Final profile is Gaussian

38 Lateral Diffusion Under Mask Edge
Diffusion is really a 3-D process. As impurities diffuse vertically, they also diffuse horizontally in both directions. Diffusion proceeds laterally under the edge of the mask opening

39 Lateral Diffusion Under Mask Edge
Original Mask

40 Concentration Dependent Diffusion

41 Concentration Dependent Diffusion

42 Resistors and Sheet Resistance

43 Stop Diffusion Slides for 3311

44 Resistors: Counting Squares
Top and Side Views of Two Resistors of Different Size Resistors Have Same Value of Resistance Each Resistor is 7  in Length Each End Contributes Approximately 0.65  Total for Each is 8.3  Figure 4.14

45 Resistors Contact and Corner Contributions
Effective Square Contributions of Various Resistor End and Corner Configurations Figure 4.15

46 Sheet Resistance: Irvin’s Curves
Irvin Evaluated this Integral and Published a Set of Normalized Curves Plot Surface Concentration Versus Average Resistivity Four Sets of Curves n-type and p-type Gaussian and erfc

47 Sheet Resistance Irvin’s Curves

48 Sheet Resistance Irvin’s Curves (cont.)

49 Two Step Diffusion Sheet Resistance - Predep Step

50 Two Step Diffusion Sheet Resistance - Drive-in Step

51 Resistivity Measurement Four-Point Probe

52 Four-Point Probe Correction Factors

53 Sheet Resistance van der Pauw’s Method

54 Junction Depth Measurement
Groove and Stain Method

55 Junction Depth Measurement
Angle Lap Technique

56 Impurity Profiling Spreading Resistance
Region of Interest is Angle-Lapped Two-Point Probe Resistance Measurements vs. Depth Profile Extracted

57 Impurity Profiling Secondary Ion Mass Spectroscopy (SIMS)

58 Diffusion Simulation After Predep After Drive-in SUPREM Simulation

59 Diffusion Systems Open Furnace Tube Systems Wafers in Quartz Boat
Solid source in platinum source boat Liquid Source - carrier gas passing through bubbler Gaseous impurity source Wafers in Quartz Boat Scrubber at Output

60 Diffusion Systems Boron Diffusion

61 Diffusion Systems Phosphorus Diffusion

62 Diffusion Systems Arsenic & Antimony Diffusion

63 Diffusion Toxicity of Gaseous Sources
Silane and Dichlorosilane Used for Polysilicon Deposition

64 Diffusion Gettering Improves Quality of Wafers Backside Treatment
Removes Metallic Impurities: Cu, Au, Fe, Ni (Rapid Diffusers) Removes Crystal Defects: Dislocations Backside Treatment Surface Damage e. g. Sandblasting Phosphorus Diffusion Argon Implantation Internal Stress Crystal Defects Oxygen Incorporation During Growth Implantation

65 Diffusion References

66 End of Diffusion Slides


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