XC9500 - Developed for a Better ISP Solution Flexible, efficient, pin-locking architecture Industry standard JTAG/ISP High endurance High performance PC & WS software Process Technology Software Chip Architecture 2 1

ISP Supports the Product Life Cycle Prototyping System Integration Field Upgrades Manufacturing Pre-production High Volume Easy prototyping: Minimize fragile package handling Develop - program - test - redesign - reprogram in an integrated software environment System integration: Advanced debugging tools via JTAG Manufacturing: Pre-production: allow last minute design changes High volume: integrate device programming & board-level test Field upgrades: Allows for design upgrading/reconfiguration in the field 11 2

ISP Market Growth 4

In-System Programming (ISP) Drives CPLD Market Growth CAGR (‘00/’95) CPLD 27% ISP 65% Total CPLD 1600 1400 1200 1000 800 ISP CPLD 600 The market for CPLDs is growing at an exciting 27% CAGR (compounded annual growth rate), per PACE Technologies, one of the industry’s most respected PLD market forecasters. The fastest growing segment of the CPLD market is based on ISP (In-System Programmable) products. With an incredible 65% CAGR, ISP is without a doubt the market with the fastest CPLD growth potential and Xilinx will focus its CPLD product strategy specifically on SOLUTIONS for this growing market. 400 200 1994 1995 1996 1997 1998 1999 2000 Source:Pace Technologies 10/96 3

XILINX CPLDs Driving the ISP Evolution Complete support of the ISP designer’s Product Life Cycle Delivers new FLASH technology benefits to CPLDs Provides industry’s best pin-locking CPLD at lowest price Complete “state-of-the-art” software support CPLDs key part of the Xilinx “total logic solution” CPLD users are all going to ISP and Xilinx will be “driving” this ISP evolution process with the XC9500. It offers the industry’s best product life cycle support, pin-locking, architecture and software to enable this evolution to take place. No other competitor offers this complete of a solution to the CPLD market. And now, with this roadmap, CPLD users can now see the Xilinx commitment to providing the next generations of CPLD products, all which will be design to fit the users needs. 6

XC9500 Supports Multiple Programming Methods ISP via PC/Workstation download cable Prototype programming/debug Functional test/programming in manufacturing Hardware programmer Data I/O, BP Micro, etc. ATE HP, GenRad, Teradyne Microprocessor/Microcontroller download 7

Benefits of ISP in Manufacturing Maximize: Profit ROI for ATE time Flexibility Manufacturing efficiency Minimize: Risk Overall manufacturing time Board/part damage Rework Inventory management Time-to-Market 8

Four Typical Manufacturing Flows AssemblePC Program ATE Test Assemble ATE Program/Test Assemble ATE Test PC Program Preprogram Assemble ATE Test 9

Flow 1 Assemble/PC Program/ATE Test Blank Chips Program on PC Test on ATE & Burn-in Inventory & Ship Programming Considerations PC Cost Handling fallout Programming personnel Cable Floor space Fixture development Xilinx Solutions JTAG Programming Software Download Parallel/Serial Cables Win 95/NT support Concurrent Programming (available 3Q97) 10

Flow 2 Assemble/ATE Program & Test Blank Chips Program & Test on ATE Inventory & Ship Burn-in Xilinx Solutions HP 3070 Support GenRAD GR228X Support Teradyne L-200/300 &Z1800 (available June ‘97) Generates Industry Standard SVF files Full JTAG Support Programming Considerations ATE memory More tester time 11

Flow 3 Assemble/ATE Test/PC Program Blank Chips Test on ATE Program on PC Functional Test Inventory & Ship Programming Considerations PC Cost Handling fallout Programming personnel Cable Floor space Fixture development Xilinx Solutions JTAG Programming Software Download Parallel/Serial Cables Win 95/NT support Concurrent Programming (available 3Q97) 12

Flow 4 Preprogram/Assemble/ATE Test Board Assembly of Programmed Chips Inventory & Ship Test on ATE Xilinx Solutions 3rd Party Programmer Certification HW130 Programmer Support Distribution Programming Center Factory Programming Programming Considerations Programming cost Inventory cost Insertion handling fallout Programmer cost 13

Robust JTAG Instruction Set Industry standard 4-pin IEEE 1149.1 JTAG Design, debug, chip test & programming through JTAG Basic JTAG support: EXTEST, SAMPLE/PRELOAD, BYPASS Industry-leading extended JTAG manufacturing support USERCODE: built-in version control capability IDCODE: identification of manufacturer, part number, silicon revision INTEST: drive/read internal logic HIGHZ: all outputs in high impedance mode, sophisticated interconnect test

XC9500 Fits In Industry Standard JTAG Chains TDI XC9500 DSP XC4000EX TMS TCK TDO uP XC9500 ASIC

Xilinx Supports All Flows Key Flow Flow Flow Flow  C Benefits/ Attribute 1 2 3 4 Option Comments Mfg Time X X Fewer steps Inventory Savings X X X X Lower cost Yield Enhancement X Lower Handling Fallout HW Cost Savings X X No need for PCs, cables, handlers Floor Space X X Less equipment Savings needed Process X X X X Easy upgrades during Adaptability prototyping phase Outsource X X Consistent with well Programming known mature flow Use of X X X X More focus on core Subcontractors competency 14

Xilinx Provides Total ISP Manufacturing Solution Many ways to program XC9500 devices in manufacturing Xilinx provides support for all flows resources, tools, relationships XC9500 has most complete JTAG support GOAL: Make customers successful in applying ISP to their manufacturing process 16

Xilinx Third Party Solutions HP 3070 ATE kit GenRAD ATE kit Teradyne ATE kit (6/97) Corelis JTAG Technologies Asset Intertech Many others…. 15