1. S. Reda EN160 SP’07 Design and Implementation of VLSI Systems (EN0160) Lecture 33: Array Subsystems (PLAs/FPGAs) Prof. Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Weste/Addison Wesley – Rabaey/Pearson - Maxfield]

2. S. Reda EN160 SP’07 Using ROMs to implement logic ROM (truth table) Inputs Outputs In most designs, using ROMs can be extremely inefficient in terms of area

3. S. Reda EN160 SP’07 Programmable logic arrays A Programmable Logic Array performs any function in sum-of-products form. Literals: inputs & complements Products / Minterms: AND of literals Outputs: OR of Minterms Example: Full Adder

4. S. Reda EN160 SP’07 NOR-NOR PLAs ANDs and ORs are not very efficient in CMOS Dynamic or Pseudo-nMOS NORs are very efficient Use DeMorgan’s Law to convert to all NORs

5. S. Reda EN160 SP’07 PLA schematic and layout

6. S. Reda EN160 SP’07 PLAs vs. ROMS PLAs are more flexible than ROMs –No need to have 2 n rows for n inputs –Only generate the minterms that are needed –Take advantage of logic simplification PLAs are popular for small-scale circuits that have 2-level implementations t PLAs are not scalable to implement large designs

7. S. Reda EN160 SP’07 Programmable logic blocks (lookup tables) Programming information could be stored in SRAM or FLASH 4-input LUT is the typical size

8. S. Reda EN160 SP’07 FPGA architecture Switch box

9. S. Reda EN160 SP’07 To implement in FPGAs, designs need to be decomposed and mapped to LBs Map to a LUT in a LB [Figure form Cong FPGA’01]

10. S. Reda EN160 SP’07 Programmable interconnects (local)

11. S. Reda EN160 SP’07 Programmable interconnects (global) Switch box

12. S. Reda EN160 SP’07 Example

13. S. Reda EN160 SP’07 Programming the FPGA

14. S. Reda EN160 SP’07 FPGAs versus custom chips Offer flexibility → FPGAs can be reprogrammed to perform different logic functions No layouts, no masks, no custom fabrication → huge savings for low, med-volume production Larger overhead in area, performance, and power

15. S. Reda EN160 SP’07 Summary We studied programmable logic devices Next time (last lecture) –Design methodologies