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S. Reda EN160 SP’07 Design and Implementation of VLSI Systems (EN0160) Lecture 28: Datapath Subsystems 2/3 Prof. Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Weste/Addison Wesley – Rabaey/Pearson]

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S. Reda EN160 SP’07 Outline Last lecture –Carry-ripple adder This lecture –More carry-ripple adders –Manchester carry chain adder –Carry-Skip adder –Carry-lookahead adder –Carry-select adder

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S. Reda EN160 SP’07 Last lecture we designed a carry-ripple adder For a full adder, define what happens to carry –Generate: C out = 1 independent of C G = A B –Propagate: C out = C P = A B –Kill: C out = 0 independent of C K = ~A ~B PG summary

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S. Reda EN160 SP’07 Group carry calculations i j k k-1 The carry into bit i is the carry-out of bit i-1 The sum is equal to

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S. Reda EN160 SP’07 Group generate i j k k-1

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S. Reda EN160 SP’07 Carry-ripple adder revisited

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S. Reda EN160 SP’07 Carry-ripple adder revisited The critical path now proceeds through a chain of AND-OR gates rather than a chain of majority gates

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S. Reda EN160 SP’07 8-bit adder/subtractor 1-bit FA S0S0 C 0 =C in C1C1 1-bit FA S1S1 C2C2 S2S2 C3C3 C 8 =C out 1-bit FA S7S7 C7C7... A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A7A7 B7B7 add/subt Ripple Carry Adder (RCA) built out of 64 FAs Subtraction – complement all subtrahend bits (xor gates) and set the low order carry-in RCA advantage: simple logic, so small (low cost) disadvantage: slow (O(N) for N bits) and lots of glitching (so lots of energy consumption)

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S. Reda EN160 SP’07 Manchester carry adder Using transmission gates Using dynamic gates

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S. Reda EN160 SP’07 Manchester carry chains Critical path involves a series propagate transistor for each bit a significant over carry-ripple (which used majority or AND-OR gate)

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S. Reda EN160 SP’07 Equivalence circuits for Manchester carry chain Do you remember this circuit?

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S. Reda EN160 SP’07 Carry skip adder If (P 0 & P 1 & P 2 & P 3 = 1) then C o,3 = C i,0 otherwise the block itself kills or generates the carry internally A0A0 B0B0 S0S0 C i,0 FA A1A1 B1B1 S1S1 A2A2 B2B2 S2S2 A3A3 B3B3 S3S3 C o,3 BP = P 0 P 1 P 2 P 3 “Block Propagate”

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S. Reda EN160 SP’07 Carry-skip adder Carry-ripple is slow through all N stages Carry-skip allows carry to skip over groups of n bits –Decision based on n-bit propagate signal Original design by Charles Babbage

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S. Reda EN160 SP’07 Carry-lookahead adder Similar to the carry-skip adder, but computes generate signals as well as group propagate signals to avoid waiting for a ripple to determine if the group generates a carry.

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S. Reda EN160 SP’07 Carry-select adder One adder calculates the sums assuming a carry-n of 0 while the other calculates the sums assuming a carry-in of 1. The actual carry triggers a multiplexer that chooses the appropriate sum

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S. Reda EN160 SP’07 Next time Comparators/shifters/multipliers

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