Alexei SemenovGeneric Digitizer Generic Digitizer 10MHZ 16 bit 6U VME Board.

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Presentation transcript:

Alexei SemenovGeneric Digitizer Generic Digitizer 10MHZ 16 bit 6U VME Board

Alexei SemenovGeneric Digitizer Futures 12 channels, 16 bit at 6U VME Board DC- up to 10MSPS Operation Up to 500k sample per channel buffer Hardware & Software onboard data processing Smart triggering based on FPGA algorithm

Alexei Semenov Generic Digitizer FPGA CYCLONE EP1C12240 State Machine Logic OR/AND NIOS Embedded Processor 10MHz,16bit 3 channels ADC 4 CHIPS VME Drivers 4Mx32 SDRAM MT48LC4M32B2 4 Mbit Serial Configuration Device EPCS4 Interface MAX7128 JTAG AnalogInputsAnalogInputs CLOCK OUT External Control VME BUS CRYSTAL 25MHz 4 Mbit Serial FLASH Device EPCS4 GATE TRIGGER SYNC IN TCLK SYNC OUT CLOCK IN

Alexei SemenovGeneric Digitizer Digitizer Prototype 12 analog inputs HW Reset EXT Gate SYNC TCLK EXT Clock EXT Trigger LED s: Ready, VME, Gate, Trigger HW Address Mode Select SW SDRAM JTAG ADC s FPGA PreAMP s VME DRIVER s 25MHz Crystal Configuration Device

Alexei SemenovGeneric Digitizer AD Bit Signal Processor The AD9826 is a complete analog signal processor. It features a 3-channel architecture designed to sample and condition the outputs of color CCD arrays. Each channel consists of an input clamp, Correlated Double Sampler (CDS), offset DAC, and Programmable Gain Amplifier (PGA), multiplexed to a high-performance 16-bit A/D converter. Features 16-Bit 15 MSPS A/D Converter 3-Channel 16-Bit Operation up to 15 MSPS 1-Channel 16-Bit Operation up to 12.5 MSPS Correlated Double Sampling 1~6x Programmable Gain ±300 mV Programmable Offset Input Clamp Circuitry Internal Voltage Reference Multiplexed Byte-Wide Output Optional Single Byte Output Mode 3-Wire Serial Digital Interface

Alexei SemenovGeneric Digitizer VME interface Digitizer MODE Control RF,53MHz TCLK Data from ADC PLL Multiplier ADC CLOCK ADC Data Channels MUX VME BUS FPGA Design FIFO 512x16 FIFO 512x16 FIFO 512x16 3 channels x 4 = 12channels Data MUX ADC Serial Control interface Set ADC Mode, Gain, Offset INT CLOCK 25MHz Gate Trigger Sync SDRAM Interface SDRAM Serial configuration Device Interface To EPCS4 Interface Local BUS Arbiter & MUX

Alexei SemenovGeneric Digitizer LabView Interface

Alexei SemenovGeneric Digitizer STILL OPEN QUESTIONS Channel to channel crosstalk is ~80dB at 10MHz from specification for AD9826. What is this ratio for a real board? And also, What is a total ADC noise (3-9 LSB from spec) ? What is a Integral and Differential Nonlinearity (16 and 0.5 LSB from spec)?