THE INVERTERS
DIGITAL GATES Fundamental Parameters l Functionality l Reliability, Robustness l Area l Performance »Speed (delay) »Power Consumption »Energy Digital Integrated Circuits© Prentice Hall 1995 Introduction
Noise in Digital Integrated Circuits Digital Integrated Circuits© Prentice Hall 1995 Introduction
DC Operation: Voltage Transfer Characteristic Digital Integrated Circuits© Prentice Hall 1995 Introduction
Mapping between analog and digital signals Digital Integrated Circuits© Prentice Hall 1995 Introduction
Definition of Noise Margins Digital Integrated Circuits© Prentice Hall 1995 Introduction
The Regenerative Property Digital Integrated Circuits© Prentice Hall 1995 Introduction
Fan-in and Fan-out Digital Integrated Circuits© Prentice Hall 1995 Introduction
The Ideal Gate Digital Integrated Circuits© Prentice Hall 1995 Introduction
VTC of Real Inverter Digital Integrated Circuits© Prentice Hall 1995 Introduction
Delay Definitions Digital Integrated Circuits© Prentice Hall 1995 Introduction
Ring Oscillator Digital Integrated Circuits© Prentice Hall 1995 Introduction
Power Dissipation Digital Integrated Circuits© Prentice Hall 1995 Introduction
CMOS INVERTER Digital Integrated Circuits© Prentice Hall 1995 Introduction
The CMOS Inverter: A First Glance Digital Integrated Circuits© Prentice Hall 1995 Introduction
CMOS Inverters Polysilicon In Out Metal1 V DD GND PMOS NMOS 1.2 m =2 Digital Integrated Circuits© Prentice Hall 1995 Introduction
Switch Model of CMOS Transistor Digital Integrated Circuits© Prentice Hall 1995 Introduction
CMOS Inverter: Steady State Response Digital Integrated Circuits© Prentice Hall 1995 Introduction
CMOS Inverter: Transient Response Digital Integrated Circuits© Prentice Hall 1995 Introduction
CMOS Properties l Full rail-to-rail swing l Symmetrical VTC l Propagation delay function of load capacitance and resistance of transistors l No static power dissipation l Direct path current during switching Digital Integrated Circuits© Prentice Hall 1995 Introduction
Voltage Transfer Characteristic Digital Integrated Circuits© Prentice Hall 1995 Introduction
PMOS Load Lines V DSp I Dp V GSp =-5 V GSp =-2 V DSp I Dn V in =0 V in =3 V out I Dn V in =0 V in =3 V in = V DD -V GSp I Dn = - I Dp V out = V DD -V DSp V out I Dn V in = V DD -V GSp I Dn = - I Dp V out = V DD -V DSp Digital Integrated Circuits© Prentice Hall 1995 Introduction
CMOS Inverter Load Characteristics Digital Integrated Circuits© Prentice Hall 1995 Introduction
CMOS Inverter VTC Digital Integrated Circuits© Prentice Hall 1995 Introduction
Simulated VTC Digital Integrated Circuits© Prentice Hall 1995 Introduction
Gate Switching Threshold Digital Integrated Circuits© Prentice Hall 1995 Introduction
MOS Transistor Small Signal Model Digital Integrated Circuits© Prentice Hall 1995 Introduction
Determining V IH and V IL Digital Integrated Circuits© Prentice Hall 1995 Introduction
Propagation Delay Digital Integrated Circuits© Prentice Hall 1995 Introduction
CMOS Inverter: Transient Response Digital Integrated Circuits© Prentice Hall 1995 Introduction
CMOS Inverter Propagation Delay Digital Integrated Circuits© Prentice Hall 1995 Introduction
Computing the Capacitances Digital Integrated Circuits© Prentice Hall 1995 Introduction
CMOS Inverters Polysilicon In Out Metal1 V DD GND PMOS NMOS 1.2 m =2 Digital Integrated Circuits© Prentice Hall 1995 Introduction
The Miller Effect Digital Integrated Circuits© Prentice Hall 1995 Introduction
Computing the Capacitances Digital Integrated Circuits© Prentice Hall 1995 Introduction
Impact of Rise Time on Delay Digital Integrated Circuits© Prentice Hall 1995 Introduction
Delay as a function of V DD Digital Integrated Circuits© Prentice Hall 1995 Introduction
Where Does Power Go in CMOS? Digital Integrated Circuits© Prentice Hall 1995 Introduction
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction MOS Transistors (again) l Device Equations: »Off (ignore sub-threshold): Vgs < Vt – Ids = 0 »Linear: Vgs > Vt & |Vdg|<|Vth| »Saturation:Vgs>Vt & |Vgd| > |Vth|
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Current Flow in an Inverter R = 100 Ohms C = 0.1 pf (100 ff)
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Spice Deck *** SPICE DECK created from inv1.sim, tech=scmos M CMOSP L=3.0U W=6.0U M CMOSN L=3.0U W=6.0U R R R C PF *vin 4 *vout 6 vdd 1 0 dc 5v ****************V1 V2 Del Tr Tf Tpw Period vin 4 0 pulse (0v 5v 5ns 5ns 5ns 5ns 50ns)
Dynamic Power Dissipation Energy/transition = C L * V dd 2 Power = Energy/transition *f =C L * V dd 2 * f Need to reduce C L, V dd, andf to reduce power. VinVout C L Vdd Not a function of transistor sizes! Digital Integrated Circuits© Prentice Hall 1995 Introduction
Impact of Technology Scaling Digital Integrated Circuits© Prentice Hall 1995 Introduction
Technology Evolution Digital Integrated Circuits© Prentice Hall 1995 Introduction
Technology Scaling (1) Minimum Feature Size Digital Integrated Circuits© Prentice Hall 1995 Introduction
Technology Scaling (2) Number of components per chip Digital Integrated Circuits© Prentice Hall 1995 Introduction
Propagation Delay Scaling Digital Integrated Circuits© Prentice Hall 1995 Introduction
Technology Scaling Models Digital Integrated Circuits© Prentice Hall 1995 Introduction
Scaling Relationships for Long Channel Devices Digital Integrated Circuits© Prentice Hall 1995 Introduction
Scaling of Short Channel Devices Digital Integrated Circuits© Prentice Hall 1995 Introduction