MOSFET: Subthreshold Operation Professor Paul Hasler.

Slides:

Advertisements

Similar presentations

Lecture Metal-Oxide-Semiconductor (MOS) Field-Effect Transistors (FET) MOSFET Introduction 1.

Advertisements

Goals Investigate circuits that bias transistors into different operating regions. Two Supplies Biasing Four Resistor Biasing Two Resistor Biasing Biasing.

MOSFET Transistor Basics

Common-Gate (Base) Amplifier and Cascode Circuits

INSULATOR i Current i = 0 Total mobile electron charge = 0.

1 LINLITHGOW ACADEMY PHYSICS DEPARTMENT MOSFETs 2 MOSFETS: CONTENT STATEMENTS Describe the structure of an n-channel enhancement MOSFET using the terms:

Linearized MOSFET Resistors

University of Toronto ECE530 Analog Electronics Review of MOSFET Device Modeling Lecture 2 # 1 Review of MOSFET Device Modeling.

Lecture 3: CMOS Transistor Theory. CMOS VLSI DesignCMOS VLSI Design 4th Ed. 3: CMOS Transistor Theory2 Outline  Introduction  MOS Capacitor  nMOS I-V.

Lecture 11: MOS Transistor

Introduction to VLSI Circuits and Systems, NCUT 2007 Chapter 6 Electrical Characteristic of MOSFETs Introduction to VLSI Circuits and Systems 積體電路概論賴秉樑.

© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

CHANNEL LENGTH AND WIDTH,

EE415 VLSI Design The Devices: MOS Transistor [Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]

Analytical 2D Modeling of Sub-100 nm MOSFETs Using Conformal Mapping Techniques Benjamin Iñiguez Universitat Rovira i Virgili (URV), Tarragona, E-43001,

Outline Introduction – “Is there a limit?”

ECD 442 Power Electronics1 Power MOSFETs Two Types –Depletion Type Channel region is already diffused between the Drain and Source Deplete, or “pinch-off”

Digital Integrated Circuits A Design Perspective

1 Lecture 4: Transistor Summary/Inverter Analysis Subthreshold MOSFET currents IEEE Spectrum, 7/99, p. 26.

© Digital Integrated Circuits 2nd Devices VLSI Devices  Intuitive understanding of device operation  Fundamental analytic models  Manual Models  Spice.

Linear, Exponential, and Quadratic Functions. Write an equation for the following sequences.

Amplifier Circuit This amplifier circuit DC analysis.

Types of MOSFETs ECE 2204.

Semiconductor Devices III Physics 355. Transistors in CPUs Moore’s Law (1965): the number of components in an integrated circuit will double every year;

Modern VLSI Design 3e: Chapter 2 Copyright  1998, 2002 Prentice Hall PTR Topics n Derivation of transistor characteristics.

MOSFET Cross-Section. A MOSFET Transistor Gate Source Drain Source Substrate Gate Drain.

© 2012 Eric Pop, UIUCECE 340: Semiconductor Electronics ECE 340 Lecture 35 MOS Field-Effect Transistor (MOSFET) The MOSFET is an MOS capacitor with Source/Drain.

© The McGraw-Hill Companies, Inc McGraw-Hill 1 PRINCIPLES AND APPLICATIONS OF ELECTRICAL ENGINEERING THIRD EDITION G I O R G I O R I Z Z O N I 9.

EE130/230M Review Session 1.Small Signal Models for MOSFET/BJT 2.MOS Electrostatics.

NOTICES Project proposal due now Format is on schedule page

© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

The Devices Digital Integrated Circuit Design Andrea Bonfanti DEIB

© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

Jan M. Rabaey The Devices Digital Integrated Circuits© Prentice Hall 1995 Introduction.

Higher order effects Channel Length Modulation Body Effect Leakage current.

ECE 340 ELECTRONICS I MOS APPLICATIONS AND BIASING.

Whiteboardmaths.com © 2004 All rights reserved

1 Small-Signal Modeling Dr. David W. Graham West Virginia University Lane Department of Computer Science and Electrical Engineering © 2010 David W. Graham.

Junction Capacitances The n + regions forms a number of planar pn-junctions with the surrounding p-type substrate numbered 1-5 on the diagram. Planar junctions.

Chapter 2 MOS Transistors. 2.2 STRUCTURE AND OPERATION OF THE MOS TRANSISTOR.

EE141 © Digital Integrated Circuits 2nd Devices 1 Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje.

Digital Integrated Circuits© Prentice Hall 1995 Devices Jan M. Rabaey The Devices.

EE141 © Digital Integrated Circuits 2nd Devices 1 Lecture 5. CMOS Device (cont.) ECE 407/507.

EE141 © Digital Integrated Circuits 2nd Devices 1 Goal of this lecture  Present understanding of device operation  nMOS/pMOS as switches  How to design.

MOSFET Structure p-Si n+ L Source Gate Drain Field Oxide Gate Oxide

Digital Integrated Circuits A Design Perspective

1ECE 584, Summer 2002Brad Noble Chapter 3 Slides Cross Sectional View of FET.

Short-channel Effects in MOS transistors

Integrated Circuit Devices Professor Ali Javey Summer 2009 MOSFETs Reading: Chapters 17 & 18.

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 10: September 19, 2014 MOS Transistor.

The MOS Transistor Polysilicon Aluminum. The NMOS Transistor Cross Section n areas have been doped with donor ions (arsenic) of concentration N D - electrons.

741 Op-Amp Where we are going:. Typical CMOS Amplifier.

MOSFET Current Voltage Characteristics Consider the cross-sectional view of an n-channel MOSFET operating in linear mode (picture below) We assume the.

EE141 © Digital Integrated Circuits 2nd Devices 1 Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje.

Animation of the MOSFET manufacturing process I encourage you to look at the website given below and use the button “animate to next” – the actual process.

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 10: September 20, 2013 MOS Transistor.

EE 466/586 VLSI Design Partha Pande School of EECS Washington State University

The MOS capacitor. (a) Physical structure of an n+-Si/SiO2/p-Si MOS capacitor, and (b) cross section (c) The energy band diagram under charge neutrality.

Damu, 2008EGE535 Fall 08, Lecture 21 EGE535 Low Power VLSI Design Lecture #2 MOSFET Basics.

MOSFETs: Drain Voltage Effects on Channel Current Prof. Paul Hasler.

The NFET explained… in only a few confusing slides.

Floating-Gate Devices / Circuits

Long Channel MOSFETs.

EE141 Chapter 3 VLSI Design The Devices March 28, 2003.

741 Op-Amp Where we are going:.

Linear Equations Y X y = x + 2 X Y Y = 0 Y =1 Y = 2 Y = 3 Y = (0) + 2 Y = 2 1 Y = (1) + 2 Y = 3 2 Y = (2) + 2 Y = 4 X.

Digital Integrated Circuits 10: Short-Channel MOSFETs

Digital Integrated Circuits 11: MOS Transistor Design and Modeling

Last Lecture – MOS Transistor Review (Chap. #3)

MATH 2311 Section 5.5.

Presentation transcript:

MOSFET: Subthreshold Operation Professor Paul Hasler

MOSFET Channel Picture

MOS Capacitor Picture

MOSFET Channel Picture

Calculation of Drain Current

No recombination  dx nd DnDn n dn qDJ  l nn drainsource n  0 l  varies as  V G  n = Ax + B RG dx nd D dt dn n     (qD n / l) ( e -(  - Vs)/UT - e -(  - Vd)/UT )   eeII uVVuVV TdgTSg   / / 0 

MOSFET Current-Voltage Curves   1 /)( 0 //)( 0 / // 0 TSG TdSTSG TD TSTG uVKV uVuV uV uVu DS eI eeI eeeII          eeII uVVuVV TdgTSg   // 0     1 / / 0 TSd TSg uVV uVV eeI    

Channel Current Dependence on Gate Voltage In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependence

Channel Current Dependence on Gate Voltage In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependence

Subthreshold MOSFETs In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependence G S D nFET G S D B pFET

Determination of Threshold Voltage Gate voltage (V) Drain current / subthreshold fit V T = 0.86

Drain Current --- Source Voltage