1. 741 Op-Amp
Where we are going:

2. Typical CMOS Amplifier

3. Subthreshold MOSFETs nFET pFET k = 0.58680 Io = 1.2104fA
0.4
0.45
0.5
0.55
0.6
0.65
0.7
0.75
0.8
0.85
0.9 10
-11
-10 -9 -8 -7 -6
Gate voltage (V)
Drain current (A)
k =
Io = fA G S D
nFET B
pFET
In linear scale, we
have a quadratic
dependence
In log-scale, we
have an exponential
dependence

4. MOSFET Current-Voltage Curves( ) e I u V T d g S - = / k ( ) I = I e kV / u e - V / u - e - V / u G T S T D T DS ( ) ( ) k ( ) = V - V / u - - V - I e g S T 1 e V / u d S T ( ) = I e ( kV - V ) / u 1 - e - V / u G S T ds T
> = I e ( kV - V ) / u V 4 U G S T ds T
Saturation

5. Drain Characteristics

6. Current Sources Current Sink Ever wonder how Current
GND Vb M5
Vout
Iout
Current
Sink V1
Vdd M6
Iout
Current
Source
Ever wonder how
we make one of these?
How “good” a current source?

7. Current versus Drain Voltage
Not flat due to Early effect
(channel length modulation)
Id = Id(sat) (1 + (Vd/VA) )
Ic = Ic(sat) (1 + (Vc/VA) )
Iout or
Id = Id(sat) eVd/VA
10mA
Rout
Ic = Ic(sat) eVc/VA
GND

8. Current Mirrors nFET Current Mirror pFET Current Mirror
GND
Iin Vb M5 Mb
Vout
Iout
Vdd Vb
Iin
Iout M7 M4
Iout = ( (W/L)5 / (W/L)b ) Iin
Iout = ( (W/L)7 / (W/L)4 ) Iin
A good way to generate a bias current

9. Current Mirror ( (W/L)7 / (W/L)b ) ( (W/L)6 / (W/L)b ) Iout / Iin =
Vout1
Vout2
Vout3 Vb Mb M5 M6 M7
GND
GND
GND
GND
Iout / Iin =
( (W/L)7 / (W/L)b )
Iout = ( (W/L)5 / (W/L)b ) Iin
Iout / Iin =
( (W/L)6 / (W/L)b )

10. Diode-Capacitor Dynamics
Iin
Iout
C (dVi/dt) = Iin - Ico exp(Vi/UT)
Iout = Ico exp(Vi/UT) Vi C
GND
(C / Iout) (d Iout /dt) = Iin - Iout
GND
GND
C (d Iout /dt) = Iout( Iin - Iout )

11. Basic One-Transistor Circuits
Common Source
Common Gate
Source Follower
Common Emitter
Common Base
Emitter Follower
The fundamental two-transisor circuit: Differential Pair

12. Multiple Transistor Configurations
Vdd
Vdd
Vdd
100pA
500mA
10mA
Vout
Vout
Vout
Vin
Vin
Vin
GND
GND
GND
Subthreshold
MOS
Above threshold
MOS
BJT
JFETs as well….

13. Above Threshold MOSFET Equations
I = (K/2k) ( (k(Vg - VT) - Vs)2
- (k(Vg - VT ) - Vd) 2 )
If k = 1 (ignoring back-gate effects):
I = (K/2) ( 2(Vgs - VT) Vds - Vds2 )
Saturation: Qd = 0
I = (K/2k) ( (k(Vg - VT) - Vs)2

14. Gummel Plots Ic: n=1, Is = 5.52fA Ib: n=1.019, Is = 0.048fA 10 10 10-4 -3 -2 10 -5
Ic: n=1, Is = 5.52fA 10 -6
Currents 10 -7 10 -8 10 -9
Ib: n=1.019, Is = 0.048fA 10
-10 10
-11 10
-12
0.1
0.2
0.3
0.4
0.5
0.6
0.7
Base-Emitter Voltage (V)

15. Small-Signal ModelingV3
gmV ro V3 V2 rp V1 + V - V3 I I V1 V1 V2 V2 rp gm ro Av
BJT
(UT b) / I
I / UT
VA / I
VA / UT
Above VT
MOSFET 
2I /(V1-V2 -VT)
VA / I
2VA/(V1-V2 -VT)
Sub VT
MOSFET 
kI / UT
VA / I
kVA / UT

16. Signal Flow in Transistors
Rules of Thumb
The collector or drain can never be an input terminal.
The base or gate can never be an output terminal.
In addition it is important to note polarity reversals on these signal paths.
The base-collector or gate-drain path inverts.
All other paths are noninverting.
(This of course assumes that there are no reactive elements causing phase shifts)
(Never is too
strong a word)

17. Spectrum of Amplifier “Loads”
Vdd
Vdd
Vdd
10mA R1 Vb
Vout
Vout
Vout
Vin
Vin
Vin
GND
GND
GND
Ideal Current
Source Load
Transistor Current
Source Load
Resistive
Load
Remember: On-chip resistors are expensive

18. Basic One-Transistor Circuits
Source Follower or Emitter Follower
Buffers (Isolates) the input to (from) the output
Vdd
Assuming an ideal current source:
Vin
Ibias = Ieo e(Vin -Vout )/UT
Vout
Vout = -UT ln(Ibias/Ieo) + Vin
100mA
GND
Ibias = Ibias e(DVin -DVout )/UT
D Vout = D Vin

19. Basic One-Transistor Circuits
Assuming an ideal current source:
Vdd
Ibias = Io ekVin/UT e-Vout/UT
Vin
Vout
Vout = UT ln(Ibias/Io) + k Vin
10nA
Ibias = Ibias ekDVin/UT e-DVout/UT
GND
D Vout = k D Vin
If we use a transistor as a current source:
Id = Ibias eVout/VA = Io ekVin/UT e-Vout/UT
Vout = UT ln(Ibias/Io) + (k // (VA/UT))Vin

20. MOS Follower Circuits

21. Source Degeneration Why do this? Higher Linearity Possible Stability
GND
Vout
Vin
Circuit
Element
Vout
Vin
Why not do this? gm
Lower Bandwidth
Higher Noise / Df
GND

22. Source Degeneration I I = Ieo e V1 /UT = Ieo e(Vin - V1 + Vout/Av )/UT
Neglect VA of Q1 and assume matched devices:
Vout I
Vin
I = Ieo e V1 /UT = Ieo e(Vin - V1 + Vout/Av )/UT
Vin V1
2 V1 = Vin + Vout / Av
GND Q1
I = Ieo e(Vin + Vout/Av )/(2 UT)
GND
A similar result for MOSFETs