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741 Op-Amp Where we are going:. Typical CMOS Amplifier.

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Presentation on theme: "741 Op-Amp Where we are going:. Typical CMOS Amplifier."— Presentation transcript:

1 741 Op-Amp Where we are going:

2 Typical CMOS Amplifier

3 Drain Characteristics

4 Current Sources Ever wonder how we make one of these? GND VbVb M5M5 V out I out Current Sink V1V1 V dd M6M6 I out Current Source How “good” a current source?

5 Current versus Drain Voltage Not flat due to Early effect (channel length modulation) I d = I d (sat) (1 + (V d /V A ) ) I d = I d (sat) e Vd/VA or I c = I c (sat) (1 + (V c /V A ) ) I c = I c (sat) e Vc/VA R out 10  A GND I out

6 Current Mirrors GND I in VbVb M5M5 MbMb V out I out I out = ( ( W/L ) 5 / ( W/L ) b ) I in nFET Current Mirror A good way to generate a bias current pFET Current Mirror I out = ( ( W/L ) 7 / ( W/L ) 4 ) I in V dd VbVb I in I out M7M7 M4M4

7 Current Mirror GND I in VbVb M5M5 MbMb V out1 I out1 GND M6M6 V out2 I out2 GND M7M7 V out3 I out3 I out = ( ( W/L ) 5 / ( W/L ) b ) I in I out / I in = ( ( W/L ) 6 / ( W/L ) b ) I out / I in = ( ( W/L ) 7 / ( W/L ) b )

8 Basic One-Transistor Circuits Common GateCommon SourceSource Follower The fundamental two-transisor circuit: Differential Pair Common BaseCommon EmitterEmitter Follower

9 Signal Flow in Transistors Rules of Thumb The collector or drain can never be an input terminal. The base or gate can never be an output terminal. In addition it is important to note polarity reversals on these signal paths. The base-collector or gate-drain path inverts. All other paths are noninverting. (This of course assumes that there are no reactive elements causing phase shifts) (Never is too strong a word)

10 Spectrum of Amplifier “Loads” V dd GND R1R1 V out V in 10  A V dd GND V out V in VbVb V dd GND V out V in Ideal Current Source Load Transistor Current Source Load Resistive Load Remember: On-chip resistors are expensive

11 Multiple Transistor Configurations GND 10  A V dd GND V out V in 500  A V dd 100pA V dd V out V in GND V out V in JFETs as well…. Subthreshold MOS Above threshold MOS BJT

12 Source or Emitter Follower Ideal current source I ref = I eo e (Vin -Vout )/U T V out = -U T ln(I bias /I eo ) + V in  V out =  V in I ref = I ref e  Vin -  Vout )/U T 100  A V dd GND V out V in 10nA V dd GND V out V in BJT or Subthreshold MOSFET: V out = V in – sqrt(2 I ref / K) ) (SubV T MOS:  V out =   V in ) or MOS (Above V T MOS ): I ref = (K/2) ( V in - V out - V T ) 2

13 Small-Signal Analysis (CD or CC) gmVgmV rr GND V out roro + V - V in (V in - V out ) / r  + (V in - V out ) g m = V out / r o V out /V in = 1/(1 + [(r  / r o )/(1 + r  g m )]) BJT (r o >> r  ) MOS (r  = 0) V out /V in ~ 1/(1 + [(r  / r o )/(r  g m )]) = 1/(1 + 1 / (r  g m ) ) = 1/(1 + U T / V A ) ~ 1 V out (1 + r o g m ) ~ r o g m V in V out /V in = 1/(1 + 1 / (r  g m ) ) = 1/(1 + U T / V A ) ~ 1

14 Common Drain or Emitter I ref 100  A V dd GND V out V in I bias = I co e Vin/U T e Vout /V A V out = -V A ln(I bias /I co ) +  (  V A / U T ) V in 100pA V dd GND V out V in I ref Ideal current source BJT or Subthreshold MOSFET: MOS (Above V T MOS ):  V out =  (  V A / U T )  V in I bias = I bias e  Vin/U T e  Vout/V A I bias = (K/2) ( V in - V T ) 2 (1 + (V out /V A ) ) Operating region decreases (V out > V in - V T ) Derive using quadratic functions:

15 Common Drain Amplifies the input signal at the output  V out =  (  V A / U T )  V in I bias = I bias e  Vin/U T e  Vout/V A 100pA V dd GND V out V in I bias Input conductance = 0

16 Common Drain We must account for the other current source:  V out =  (  (V An // V Ap ) U T )  V in I d = I bias e -  Vout/V Ap = I bias e  Vin/U T e  Vout/V An VbVb V dd GND V out M6M6 M7M7 V in I bias

17 Common Drain What about above-threshold operation: I bias = (K/2) ( V in - V T ) 2 (1 + (V out /V A ) ) 100  A V dd GND V out V in I bias Operating region decreases (V out > V in - V T ) Derive using quadratic functions:

18 Common Base Amplifies the input signal at the output (non-inverting gain) I bias 100  A V dd V out V in Common Base / Common Gate Assuming an ideal current source: I bias = I co e (V b -V in )/U T e Vout /V A V out = -V A ln(I bias /I co ) + (V A / U T ) V in  (V A / U T ) V b VbVb Gain = V A / U T = A v

19 Common Gate Using a subthreshold MOSFET : 100pA V dd V out I bias V in VbVb I bias = I o e (  V b -V in )/U T e Vout /V A V out = -V A ln(I bias /I o ) + (V A / U T ) V in  (  V A / U T ) V b Gain = V A / U T = A v Problem: Large input current

20 Cascode Circuits Use a common-gate/base transistor to: 1. Improve the output resistance of another transistor. 2. Reduce the Gate-to-Drain capacitance effect of another transistor. Input resistance of common-gate is low Source is nearly fixed if connected to the drain of a transistor V drain VbVb GND V1V1 V gate

21 Cascode Circuits V drain V bias GND V1V1 V gate Fixes the voltage at V 1 or isolates V 1 from the output GND V gate V drain I drain = I o e (  V bias -V 1 )/U T e V drain /V A = I o e  V gate /U T e V 1 /V A V 1 ~  V bias -  V gate + (U T /V A ) V drain Drain is fixed I drain = I o e  V gate /U T e  V bias /V A e V drain / (A v V A )

22 Cascode Common-Drain Amp GND I bias VbVb MbMb GND V1V1 V dd V out bias p bias n One Pole High Output Resistance / DC Gain


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