Adders Lecture L7.1 Section 6.2 Section 10.4 (pp )

Adders Half Adder Full Adder TTL Adder

Half Adder CABS 0001 A 0 B 0 S 0 C Dec Binary

Multiple-bit Addition A B A 3 A 2 A 1 A A B 3 B 2 B 1 B 0 B A i +B i +C i SiSi C i+1

Full Adder C i A i B i S i C i CiCi AiBiAiBi SiSi

Full Adder C i A i B i S i C i+1 S i = !C i & !A i & B i # !C i & A i & !B i # C i & !A i & !B i # C i & A i & B i

Full Adder S i = !C i & !A i & B i # !C i & A i & !B i # C i & !A i & !B i # C i & A i & B i S i = !C i & (!A i & B i # A i & !B i ) # C i & (!A i & !B i # A i & B i ) S i = !C i & (A i $ B i ) # C i & !(A i $ B i ) S i = C i $ (A i $ B i )

Full Adder C i A i B i S i C i CiCi AiBiAiBi C i+1

Full Adder C i A i B i S i C i+1 CiCi AiBiAiBi C i+1 C i+1 = A i & B i # C i & B i # C i & A i

Full Adder C i A i B i S i C i+1 CiCi AiBiAiBi C i+1 C i+1 = A i & B i # C i & !A i & B i # C i & A i & !B i

Full Adder C i+1 = A i & B i # C i !A i & B i # C i & A i & !B i C i+1 = A i & B i # C i & (!A i & B i # A i & !B i ) C i+1 = A i & B i # C i & (A i $ B i ) Recall: S i = C i $ (A i $ B i ) C i+1 = A i & B i # C i & (A i $ B i )

Full Adder S i = C i $ (A i $ B i ) Half-adder C i+1 = A i & B i # C i & (A i $ B i )

Full Adder A full adder can be made from two half adders (plus an OR gate).

Full Adder Block Diagram

4-Bit Adder C A B S

adder.abl MODULE adder TITLE ‘4-Bit Adder' DECLARATIONS " INPUT PINS " A3..A0 PIN 11, 7, 6, 5; " Switch S6(1..4) A = [A3..A0]; " 4-bit operand B3..B0 PIN 4, 3, 2, 1; " Switch S7(1..4) B = [B3..B0]; " 4-bit addend " OUTPUT PINS " S3..S0 PIN 40, 41, 43, 44 ISTYPE 'com'; " LED S = [S3..S0]; " 4-bit sum CF PIN 39 ISTYPE 'com'; " LED 12; carry flag OVF PIN 35 ISTYPE 'com'; " LED 9; overflow flag

adder.abl (cont’d) " INTERMEDIATE NODES " C4..C0 NODE ISTYPE 'com'; " internal carry vector Cin = [C3..C0]; " carry input vector Cout = [C4..C1]; " carry output vector Intermediate Carry bits

adder.abl (cont’d) S i = C i $ (A i $ B i ) C i+1 = A i & B i # C i & (A i $ B i ) EQUATIONS C0 = 0; " zero carry in S = A $ B $ Cin; " sum output Cout = A & B # (A $ B) & Cin; " carry output vector CF = C4; " carry flag OVF = C4 $ C3; " overflow flag END adder4 Why?

C4A3B3C3 0000Adding positive #s, result positive 0001Adding positive #s, result negative 0100Adding a negative and a positive Adding 2 negative #s, result positive 1111Adding 2 negative #s, result negative OVF Sign BitsDiscard

= = -14 discard 0010=2 Wrong => OVF = = =-7 discard 1001=-7 Correct C4C3C4C3 A3A3 B3B3

Carry and Overflow C = 0 O = E Dec Hex Binary Note no carry from bit 6 to bit 7 and no carry from bit 7 to C.

Carry and Overflow C = 0 O = B 90 Dec Hex Binary Thinking SIGNED we added two positive numbers and got a negative result. This can’t be correct! Therefore, the OVERFLOW bit, O, is set to 1. Correct answer (144) is outside the range -128 to Note carry from bit 6 to bit 7 but no carry from bit 7 to C.

Carry and Overflow C = 1 O = D3 108 Dec Hex Binary Thinking SIGNED we added a positive number to a negative number and got the correct positive answer. Therefore, the OVERFLOW bit, O, is cleared to 0. Correct answer (8) is inside the range -128 to Ignore carry Note carry from bit 6 to bit 7 and carry from bit 7 to C.

Carry and Overflow C = 1 O = E +D3 171 Dec Hex Binary Thinking SIGNED we added two negative numbers and got a positive answer. This must be wrong! Therefore, the OVERFLOW bit, O, is set to 1. Correct answer (-143) is outside the range -128 to Ignore carry Note no carry from bit 6 to bit 7 but there is a carry from bit 7 to C.

Overflow Note that the overflow bit was set whenever we had a carry from bit 6 to bit 7, but no carry from bit 7 to C. It was also set when we had a carry from bit 7 to C, but no carry from bit 6 to bit 7. Upshot: The overflow bit is the EXCLUSIVE-OR of a carry from bit 6 to bit 7 and a carry from bit 7 to C.

TTL Adder GND Vcc B3 S1 B1 C4 S4 B4 C0 A3 S3 A4 A2 B2 S2 A1 74LS283

Question Add the following 8-bit binary numbers What is the answer in hex? Was there a net carry? Was there an overflow? = =-74 = 111 =25H=