1. President UniversityErwin SitompulDigital Systems 7/1 Lecture 7 Digital Systems Dr.-Ing. Erwin Sitompul President University http://zitompul.wordpress.com 2015

2. President UniversityErwin SitompulDigital Systems 7/2 Section 8 Multiplexers Digital Systems

3. President UniversityErwin SitompulDigital Systems 7/3 Multiplexer (Mux) A multiplexer (mux) is a digital circuit building block which is used to select and transmit one of its 2 n inputs to its one output, based on n select bit. A multiplexer allows for conditional data transfer. A 4-input mux needs 2 select bit to indicate which input to route through. An 8-input mux needs 3 select bits, and so on. ● A railway switch LectureDigital Systems

4. President UniversityErwin SitompulDigital Systems 7/4 Multiplexer (Mux) LectureDigital Systems Four data are possible to be displayed: Air temperature (T), average km/l (A), instantaneous km/l (I), and kilometer remaining (M), each 8-bit wide. We can chose which to display by using two inputs X and Y. In this case, an 8-bit 4-to-1 multiplexer is used.

5. President UniversityErwin SitompulDigital Systems 7/5 2-to-1 Multiplexer LectureDigital Systems A multiplexer with one select bit is shown below, or 2-to-1 multiplexer. If S = 0, then Y = I 0, if S = 1, then Y = I 1. ● Circuit of 2-to-1 multiplexer ● Symbol

6. President UniversityErwin SitompulDigital Systems 7/6 2-to-1 Multiplexer 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 0 1 1 0 1 0 1 SI0I0 I1I1 F(S,I 0,I 1 ) 0 1 I0I0 I1I1 S LectureDigital Systems ● Truth table ● Compact truth table ● Determine the Boolean expression for Y as a function of I 0, I 1, and S. ? ● Y = S’I 0 + SI 1 A

7. President UniversityErwin SitompulDigital Systems 7/7 4-to-1 Multiplexers LectureDigital Systems A 4-to-1 multiplexer is shown below. ● Determine the Boolean expression for Y as a function of D i and S i. ?

8. President UniversityErwin SitompulDigital Systems 7/8 I0I0 I1I1 0 1 I2I2 I3I3 0 1 F 0 1 S0S0 S1S1 4-to-1 Multiplexers A 4-to-1 multiplexer can also be made by using two 2-to-1 multiplexers, as shown below: LectureDigital Systems

9. President UniversityErwin SitompulDigital Systems 7/9 Quadruple 2-to-1 Multiplexer LectureDigital Systems A quadruple 2-to-1 multiplexer is shown below.

10. President UniversityErwin SitompulDigital Systems 7/10 Design Exercise: Multiplexer LectureDigital Systems Design a multiplexer with 8 inputs (A1, A2, B1, B2, C1, C2, D1, D2), with 2 outputs and 4 possibilities of transmission: (A1, A2), (B1, B2), (C1, C2), and (D1, D2). Give the logic expression and the logic circuit of the multiplexer. A2A2 B2B2 O2O2 O1O1 C2C2 D2D2 A1A1 B1B1 C1C1 D1D1

11. President UniversityErwin SitompulDigital Systems 7/11 Exercise: Crossbar Switch LectureDigital Systems Find out the truth table of the following circuit? What can the function of this circuit? X1X1 0 1 X2X2 0 1 S Y1Y1 Y2Y2 X1X1 X2X2 S Y1Y1 Y2Y2 This crossbar switch circuit is capable to connect any input to any output. Here X 1 and X 2 can be set to pass through Y 1 or Y 2. 0 X1X1 X2X2 X1X1 SX1X1 X2X2 Y1Y1 X2X2 Y2Y2 1 X1X1 X2X2 X2X2 X1X1 (Straight) (Crossed)

12. President UniversityErwin SitompulDigital Systems 7/12 Section 9 Binary Adders Digital Systems

13. President UniversityErwin SitompulDigital Systems 7/13 Binary Adders LectureDigital Systems Addition of binary data is very fundamental in digital systems. The hardware implementation needs to be determined. The inputs are: single bit values, carry in The outputs are: sum, carry out. After creating a single-bit adder, we can chain multiple adders together. Overflow must also be considered. Overflow is the situation where the result of addition exceeds the magnitude which can be represented with the allocated number of bits.

14. President UniversityErwin SitompulDigital Systems 7/14 Half Adder A half adder adds two binary numbers. The inputs: A 0, B 0 (single bit inputs). The outputs: S 0 (single bit sum) and C 1 (carry out). LectureDigital Systems ● Truth Table of Half Adder ● Circuit of Half Adder

15. President UniversityErwin SitompulDigital Systems 7/15 Multiple Bit Addition LectureDigital Systems Consider the addition of 2 binary numbers, A and B. Addition of each bit position A i and B i creates a sum S i and a carry C i+1.

16. President UniversityErwin SitompulDigital Systems 7/16 Full Adder LectureDigital Systems A full adder adds two binary numbers but also include a carry in. The inputs: A i, B i, C i (single bit inputs). The outputs: S i (single bit sum) and C i+1 (carry out). ● Truth Table of Half Adder ● K-Map for S i ● K-Map for C i+1

17. President UniversityErwin SitompulDigital Systems 7/17 Full Adder LectureDigital Systems S i = A i ’B i ’C i + A i ’B i C i ’ + A i B i ’C i ’ + A i B i C i Let us now simplify Boolean function for S by using Boolean algebra. S i = C i ·(A i  B i )’ + C i ’·(A i  B i ) S i = C i  (A i  B i ) Hint: A  B = A·B’ + A’·B (A·B)’= A’ + B’ (A+B)’= A’ · B’ S i = C i ·(A i ’B i ’ + A i B i ) + C i ’·(A i ’B i + A i B i ’)

18. President UniversityErwin SitompulDigital Systems 7/18 Full Adder LectureDigital Systems C i+1 = A i B i + A i C i +B i C i (previous result) Let us now simplify Boolean function for C i+1 by using Boolean algebra. Hint: A  B = A·B’ + A’·B (A·B)’= A’ + B’ (A+B)’= A’ · B’ C i+1 = A i B i + C i A i ’B i +C i A i B i ’(as shown by K-map below) C i+1 = A i B i + C i ·(A i ’B i + A i B i ’) C i+1 = A i B i + C i ·(A i  B i )

19. President UniversityErwin SitompulDigital Systems 7/19 Full Adder LectureDigital Systems The logic circuit of the full adder can be shown as: S i = C i  (A i  B i ) C i+1 = A i B i + C i ·(A i  B i ) A full adder can be made from 2 half adders and an OR Gate. Such structure repetition simplifies circuit design. Half adder

20. President UniversityErwin SitompulDigital Systems 7/20 Full Adder LectureDigital Systems = This single bit full adder will be the building block of large adders.

21. President UniversityErwin SitompulDigital Systems 7/21 n × Full Adder = n-bit Ripple Carry Adder LectureDigital Systems ● 4-bit ripple-carry adder MSB positionLSB position

22. President UniversityErwin SitompulDigital Systems 7/22 Section 10 Signed Numbers Digital Systems

23. President UniversityErwin SitompulDigital Systems 7/23 How to Represent Signed Numbers For decimal numbers, it is common to use the sign + and –, as for +25, –16, +433, –2775. For computers, where operations are done using binary digits, it is desirable to represent signed numbers also in bits. There are 3 representations of signed binary numbers: 1.Signed magnitude 2.1’s complement 3.2’s complement LectureDigital Systems In each case, the left-most bit indicates the sign: 0 means positive, 1 means negative.

24. President UniversityErwin SitompulDigital Systems 7/24 How to Represent Signed Numbers LectureDigital Systems b n–1 Magnitude MSB ● Unsigned number b1b1 b0b0 Magnitude Sign 0 denotes 1 denotes + –MSB ● Signed number b n–1 b1b1 b0b0 b n–2

25. President UniversityErwin SitompulDigital Systems 7/25 Signed Numbers ● Number circle for 4-bit 2’s complement numbers LectureDigital Systems ● 4-bit signed binary number comparison 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 1+1– 2+ 3+ 4+ 5+ 6+ 7+ 2– 3– 4– 5– 6– 7– 8– 0

26. President UniversityErwin SitompulDigital Systems 7/26 Signed Numbers LectureDigital Systems ● 4-bit signed binary number comparison

27. President UniversityErwin SitompulDigital Systems 7/27 As mentioned before, in signed magnitude, the left-most bit is used to indicate the sign. 0 means positive, 1 means negative. Signed Magnitude Representation LectureDigital Systems By using signed magnitude, n bits can be used to represent integers N in the range of: 2 n–1 – 1 ≤ N ≤ 2 n–1 – 1 For example, the range of an unsigned 4-bit binary number is from 0 to 15. The range of a signed 4-bit binary number is –7 to + 7 (or 1111 2 to 0111 2 ) For signed magnitude, there are two representations for zero. For example, with n = 4, 0000 and 1000. 00001100 2 = 12 10 Sign bitMagnitude 10001100 2 = –12 10 Sign bitMagnitude

28. President UniversityErwin SitompulDigital Systems 7/28 1’s Complement Representation LectureDigital Systems The 1’s complement of a binary number involves inverting all bits. 1s become 0s, and 0s become 1s. As example, 1’s complement of 00110011 is 11001100 1’s complement of 10101010 is 01010101. Thus, for an n-bit number N, the 1’s complement is 2 n – 1 – N. To find the negative of a number, take the 1’s complement of that number. For 1’s complement, there are two representations for zero. For example, with n = 4, 0000 and 1111. 00001100 2 = 12 10 Sign bitMagnitude 11110011 2 = –12 10 Sign bitMagnitude

29. President UniversityErwin SitompulDigital Systems 7/29 1’s Complement Addition / Subtraction LectureDigital Systems As Example 1, suppose we wish to add 12 10 + 1 10. 12 10 = 1100 2 = 01100 2 in 1’s complement 1 10 = 0001 2 = 00001 2 in 1’s complement Step 1: Add the binary numbers Step 2: Add the carry to lowest-order bit 01100 2 00001 2 01101 2 0 0 = 13 10

30. President UniversityErwin SitompulDigital Systems 7/30 1’s Complement Addition / Subtraction LectureDigital Systems Step 1: Add the binary numbers Step 2: Add the carry to lowest-order bit 01100 2 11110 2 01010 2 1 1 01011 2 As Example 2, suppose we wish to substract 12 10 – 1 10. 12 10 = 1100 2 = 01100 2 in 1’s complement –1 10 = –0001 2 = 11110 2 in 1’s complement = 11 10

31. President UniversityErwin SitompulDigital Systems 7/31 1’s Complement Addition / Subtraction LectureDigital Systems Step 1: Add the binary numbers Step 2: Add the carry to lowest-order bit 11010 2 11011 2 10101 2 1 1 10110 2 As Example 3, suppose we wish to substract –5 10 – 4 10. –5 10 = –0101 2 = 11010 2 in 1’s complement –4 10 = –0100 2 = 11011 2 in 1’s complement = –1001 2 = –9 10

32. President UniversityErwin SitompulDigital Systems 7/32 1’s Complement Addition / Subtraction LectureDigital Systems Step 1: Add the binary numbers Step 2: Add the carry to lowest-order bit 11010 2 00100 2 11110 2 0 0 As Example 4, suppose we wish to substract –5 10 + 4 10. –5 10 = –0101 2 = 11010 2 in 1’s complement –4 10 = –0100 2 = 00100 2 in 1’s complement = –0001 2 = –1 10

33. President UniversityErwin SitompulDigital Systems 7/33 2’s Complement Representation LectureDigital Systems The 2’s complement of a binary number involves inverting all bits and adding 1. As example, 2’s complement of 00110011 is 11001101 2’s complement of 10101010 is 01010110. Thus, for an n-bit number N, the 2’s complement is 2 n – 1 – N + 1 = 2 n – N. To find the negative of a number, take the 2’s complement of that number. For 2’s complement more negative numbers than positive. 00001100 2 = 12 10 Sign bitMagnitude 11110100 2 = –12 10 Sign bitMagnitude

34. President UniversityErwin SitompulDigital Systems 7/34 2’s Complement Addition / Subtraction LectureDigital Systems Step 1: Add the binary numbers Step 2: Discard the carry 11011 2 01001 2 00100 2 1 As Example 5, suppose we wish to add –5 10 + 9 10. –5 10 = –0101 2 = 11011 2 in 2’s complement –9 10 = –1001 2 = 01011 2 in 2’s complement = 4 10

35. President UniversityErwin SitompulDigital Systems 7/35 2’s Complement Addition / Subtraction LectureDigital Systems Step 1: Add the binary numbers Step 2: Discard the carry 11011 2 10111 2 10010 2 1 As Example 6, suppose we wish to add –5 10 – 9 10. –5 10 = –0101 2 = 11011 2 in 2’s complement –9 10 = –1001 2 = 10111 2 in 2’s complement = –1110 2 = –14 10

36. President UniversityErwin SitompulDigital Systems 7/36 1 2’s Complement Addition / Subtraction LectureDigital Systems Step 1: Add the binary numbers Step 2: Discard the carry 01101 2 11011 2 01000 2 As Example 7, suppose we wish to substract 13 10 – 5 10. 13 10 = –1101 2 = 01101 2 in 2’s complement –5 10 = –0101 2 = 11011 2 in 2’s complement = 8 10

37. President UniversityErwin SitompulDigital Systems 7/37 2’s Complement Addition / Subtraction LectureDigital Systems Step 1: Add the binary numbers Step 2: Discard the carry 00101 2 10100 2 11001 2 0 As Example 8, suppose we wish to substract 5 10 – 12 10. 5 10 = –0101 2 = 00101 2 in 2’s complement –12 10 = –1100 2 = 10100 2 in 2’s complement = –0111 2 = –7 10

38. President UniversityErwin SitompulDigital Systems 7/38 Adder-Subtractor Circuit LectureDigital Systems The following circuit is called an adder-subtractor. This circuit is capable of adding and subtracting binary numbers. When D = 0, the circuit performs addition, S = A + B. When D = 1, the circuit performs subtraction, S = A – B. The XOR Gates invert the value of B to its 2’s complement (C 0 = 1). D

39. President UniversityErwin SitompulDigital Systems 7/39 Comparing the Signed Numbers LectureDigital Systems 1.Signed magnitude:  Negating is very easy  Just change the sign bit  Adding or subtracting is difficult  If the signs are the same, add the magnitudes and keep the sign. If the signs are different, subtract the smaller operand from the larger operand. The sign of the result is the same as the sign of the larger operand.  Rather complex circuit is required. 2.1’s complement:  Negating is easy  Invert the number but keep the sign bit.  Adding and subtracting is much easier  Include the sign bits, add directly. If there is carry, add it to the sum  Simple but must differentiate cases where carry is 0 or 1. 3.2’s complement:  Negating is not easy  Invert the number, keep the sign, add 1.  Adding and subtracting is easy  Include the sign bits, add directly. Ignore the carry, directly get the result.  Simple circuit

40. President UniversityErwin SitompulDigital Systems 7/40 Overflow in Binary Addition and Subtraction LectureDigital Systems When two numbers of the same sign are added, the answer may not fit the number of bits provided. In this case, the answer exceeds the magnitude which can be represented with the allotted number of bits. This is called overflow. In 2’s complement, overflow occurs when a transition is made from 2 n–1 –1 to –2 n–1 when adding or from –2 n–1 to 2 n–1 –1. 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 1+1– 2+ 3+ 4+ 5+ 6+ 7+ 2– 3– 4– 5– 6– 7– 8– 0

41. President UniversityErwin SitompulDigital Systems 7/41 Overflow in 4-bit 2 Complement Number LectureDigital Systems 00 0010 0011 0101 235235 01 0011 0110 1001 Overflow 3 6 –7 11 1110 1101 1011 –2 –3 –5 10 1101 1010 0111 Overflow –3 –6 7 00 0010 1100 1110 2 –4 –2 11 1110 0100 0010 –2 4 2

42. President UniversityErwin SitompulDigital Systems 7/42 Homework 7 1.Create a full adder by using NOR Gates only. 2.Convert 1 0111 0110 2 to decimal from i.signed magnitude ii.1’s complement iii.2’s complement 3.Calculate the following equations using signed magnitude: –8 10 – 10 10 = 23 10 – 17 10 = 4.Calculate each of the following equations using 1’s and 2’s complement: –3 10 – 10 10 = 22 10 – 30 10 = LectureDigital Systems Deadline: 11 November 2015.