S. Reda EN160 SP’07 Design and Implementation of VLSI Systems (EN0160) Prof. Sherief Reda Division of Engineering, Brown University Spring 2007 [sources:

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Design and Implementation of VLSI Systems (EN1600)

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S. Reda EN160 SP’07 Design and Implementation of VLSI Systems (EN0160) Prof. Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Weste/Addison Wesley – Rabaey/Pearson]

S. Reda EN160 SP’07 Design Layout using Tanner L-Edit

S. Reda EN160 SP’07 How can we design the layout for an inverter?

S. Reda EN160 SP’07 Design Rules

S. Reda EN160 SP’07 1. First specify λ (using 0.5μ technology)

S. Reda EN160 SP’07 N well creation

S. Reda EN160 SP’07 Active region

S. Reda EN160 SP’07 P-Select

S. Reda EN160 SP’07 N-select

S. Reda EN160 SP’07 Active well/substrate taps

S. Reda EN160 SP’07 Select for taps

S. Reda EN160 SP’07 Polysilicon

S. Reda EN160 SP’07 Metal 1

S. Reda EN160 SP’07 Contacts (to active)

S. Reda EN160 SP’07 Contacts to poly

S. Reda EN160 SP’07 Contacts to poly

S. Reda EN160 SP’07 Little metal1 for input pin

S. Reda EN160 SP’07 Via1 from metal1 to metal2

S. Reda EN160 SP’07 Add little metal2 for output pin

S. Reda EN160 SP’07 Design Rule Checker (DRC) verifies that your layout did not violate any rules ignore these now error

S. Reda EN160 SP’07 Label your inverter pins

S. Reda EN160 SP’07 Extract your design into SPICE to simulate and verify it

S. Reda EN160 SP’07 Verify your inverter DC characteristics in SPICE Fix your SPICE input file first simulate and plot