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Design and Implementation of VLSI Systems (EN1600) lecture07 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison.

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Presentation on theme: "Design and Implementation of VLSI Systems (EN1600) lecture07 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison."— Presentation transcript:

1 Design and Implementation of VLSI Systems (EN1600) lecture07 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison Wesley – Rabaey Pearson - Baker Wiley]

2 MOS transistor theory Schedule for 4 lectures –Ideal (Shockley) Model –Non-ideal model –Inverter DC characteristics –SPICE

3 gate-oxide-body sandwich = capacitor Operating modes Accumulation Depletion Inversion The charge accumulated is proportional to the excess gate-channel voltage (V gc -V t )

4 The MOS transistor has three regions of operation Cut off V gs < V t Linear (resistor): V gs > V t & V ds < V SAT =V gs -V t Current prop to V ds Saturation: V gs > V t and V ds ≥ V SAT =V gs -V t Current is independent of V ds NMOS transistor, 0.25um, Ld = 10um, W/L = 1.5, VDD = 2.5V, VT = 0.4V

5 How to calculate the current value? MOS structure looks like parallel plate capacitor while operating in inversion –Gate – oxide – channel Q channel = CV C = ε ox WL/t ox = C ox WL (where C ox =ε ox /t ox ) V = V gc – V t = (V gs – V ds /2) – V t

6 Carrier velocity is a factor in determining the current Charge is carried by electrons Carrier velocity v proportional to lateral E-field between source and drain v = μE μ called mobility E = V ds /L Time for carrier to cross channel: t = L / v

7 I=Q/t Now we know –How much charge Q channel is in the channel –How much time t each carrier takes to cross

8 In linear mode (V gs > V t & V ds < V gs -V t ) Can be ignored for small V ds  For a given V gs, I ds is proportional (linear) to V ds

9 In saturation mode (V gs > V t and V ds ≥ V gs -V t )  Now drain voltage no longer increases current pinched off

10 Operation modes summary

11 Transistor capacitance  Gate capacitance: to body + to drain + to source  Diffusion capacitance: source-body and drain-body capacitances

12 Gate capacitance as a function of Vgs

13 Source/Drain diffusion capacitance C sb, C db Undesirable, called parasitic capacitance Capacitance depends on area and perimeter –Use small diffusion nodes –Comparable to C g –Varies with process Bottom Side wall Channel Source N D Channel-stop implant N A 1 SubstrateN A W x j L S

14 Summary Covered ideal (long channel) operation (Shockley model) of transistor Next time: short-channel transistors TA


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