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CMOS VLSI Design MOSIS Layout Rules. CMOS VLSI DesignSlide 2.

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Presentation on theme: "CMOS VLSI Design MOSIS Layout Rules. CMOS VLSI DesignSlide 2."— Presentation transcript:

1 CMOS VLSI Design MOSIS Layout Rules

2 CMOS VLSI DesignSlide 2

3 CMOS VLSI DesignSlide 3

4 CMOS VLSI DesignSlide 4

5 CMOS VLSI DesignSlide 5

6 CMOS VLSI DesignSlide 6 via for connecting between metals

7 CMOS VLSI DesignSlide 7

8 CMOS VLSI DesignSlide 8

9 CMOS VLSI DesignSlide 9

10 CMOS VLSI DesignSlide 10

11 CMOS VLSI DesignSlide 11

12 CMOS VLSI DesignSlide 12

13 CMOS VLSI DesignSlide 13

14 CMOS VLSI DesignSlide 14

15 CMOS VLSI DesignSlide 15 Use microwind to layout and simulate an inverter 1. create a n-well 2. poly 3. n+ diff 4. P+ diff 5. contact 6. metal

16 CMOS VLSI DesignSlide 16 Download the microwind from course website HW4: due 9.25.2008 1. Layout and simulate an inverter 2. Layout and simulate a 2-input NAND 3. Layout and simulate a 2-input NOR 4. Layout and simulate the function F F = (AB + CD)’


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