1. Design and Implementation of VLSI Systems (EN0160) Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Weste/Addison Wesley – Rabaey Pearson]

2. Lecture05: MOS transistor theory Last time –Gate layouts and stick diagrams This time –MOS transistor theory (ideal case)

3. gate-oxide-body sandwich = capacitor Operating modes Accumulation Depletion Inversion The charge accumulated is proportional to the excess gate-channel voltage (V gc -V t )

4. The MOS transistor has three regions of operation Cut off V gs < V t Linear (resistor): V gs > V t & V ds < V gs -V t Current α V ds Saturation: V gs > V t and V ds ≥ V gs -V t Current is independent of V ds NMOS transistor, 0.25um, Ld = 10um, W/L = 1.5, VDD = 2.5V, VT = 0.4V

5. How to calculate the current value? MOS structure looks like parallel plate capacitor while operating in inversion –Gate – oxide – channel Q channel = CV C = ε ox WL/t ox = C ox WL (where C ox =ε ox /t ox ) V = V gc – V t = (V gs – V ds /2) – V t

6. Carrier velocity is a factor in determining the current Charge is carried by electrons Carrier velocity v proportional to lateral E-field between source and drain v = μE μ called mobility E = V ds /L Time for carrier to cross channel: t = L / v

7. I=Q/t Now we know –How much charge Q channel is in the channel –How much time t each carrier takes to cross

8. In linear mode (V gs > V t & V ds < V gs -V t ) Can be ignored for small V ds  For a given V gs, I ds is proportional (linear) to V ds

9. In saturation mode (V gs > V t and V ds ≥ V gs -V t )  Now drain voltage no longer increases current

10. Operation modes summary – 0.6 micron process – t ox = 100 Å –  = 350 cm 2 /V*s – V t = 0.7 V – W/L = 4/2

11. PMOS is similar

12. What happens when we construct a INV (PMOS+NMOS)?

13. Inverter voltage transfer function A B C E D

14. Summary This lecture –Ideal transistor modeling Next lecture –Non ideal transistor modeling

15. Inverter current transfer function