Power and control electronics for the new fast wire scanners

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Presentation transcript:

Power and control electronics for the new fast wire scanners BI day 2017 P. Andersson BI Day 2017 P.Andersson

Introduction Content of this presentation: Beam Wire Scanner New Scanner First prototype, Installation, Commission New Electronic Schedule BI Day 2017 P.Andersson

1) Beam Wire Scanner (BWS) working principle Courtesy of J.Emery Secondary Particle (Interaction Wire – Beam) Vacuum pipe Particle Beam Forks Movement Scintillator Optical filters Control & Acquisition PM current Fork position Photomultiplier Preamplifier Example of one BWS installed in the PS accelerator Beam Transversal Profile BI Day 2017 P.Andersson

Operational Scanners overview Machine Scanner type installed Secondary particles detector (Scintillator Filters Photomultiplier) Fast acquisition (bunch profiling) Scanner per tank Maximum speed (m/s) Wire size Aperture (mm) 2012 run, Number of cycles per scanner PSB Rotating fast 8 1 for 2 scanners x 2 20 12x7mm (C) 112 3k – 11k PS 5 2 per scanner 1 15-20  112 2k – 11k SPS Rotating (short and Long) 6 Yes 30mm (C)  170 4.5k - 9.5k Linear 4 yes  56 0.2k LHC 1 for 4 scanners  60 4k Courtesy of J.Emery LHC scanners beam 1 SPS PSB scanners SPS scanners 416 BI Day 2017 P.Andersson

Architecture of the BWS (Based on VME since 2009) UNDERGROUND (radioactive) Up to 250m ! CCC & databases SURFACE INSTALLATION Multiplexers Power Courtesy of J.Emery CPU R IO3 T IMING BOBR HV CTRL DAB+ I BMS Motion control board Power amplifier behind the VME Position SPS Step motor control MTG master BST master BI Day 2017 P.Andersson

Issues last 10 years BWS Breaking wires due to: - Beam interaction. - Induced RF power. Instabilities of position and profile measurements due to: - Inaccuracy of position measurements. - Flexibility, vibrations in mechanics and wire (in some cases). Aging bellows in PS (broke after ~13000 scans). Outgassing bellows in LHC during bake-out. Timing jitter in PS. Magnet quenching in LHC (simulations GEANT4). Fixation wires in fork. SPS BI Day 2017 P.Andersson

2) The aim of the project is to change 3 different types of scanner by only one that will have better performance in terms of accuracy, reliability, speed and acquisition dynamic range. SPS BI Day 2017 P.Andersson

The motor is changed from a DC motor to a permanent magnet brushless synchronous motor. Which will demand new electronics. Courtesy of D. Gudkov New Mechnics, Encoder and Fork on the Motor axel! Less mechanically Play! BI Day 2017 P.Andersson

New Architecture BWS Up to 250m ! UNDERGROUND (radioactive) SURFACE INSTALLATIONS VME Software and firmware Stand alone Unit Wire Interface Courtesy of J.Emery Optical interface CPU Timing Digital board Acquisition ctrl Position ctrl Resolver interface Power amplifier Filter Settings databases Photomultiplier Storage databases Accelerator control room (CCC) BI Day 2017 P.Andersson BWS discussion on the FPGA platform - J.Emery - 19.05.2016

3) SPS LSS5 wire scanner tunnel 2015 4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 First beam test performed at the end of 2015 and still in operation It uses the control platform based on FPGA Wire scanner prototype Particles shower measured by diamond detectors Courtesy of J. Sirvent BI Day 2017 P.Andersson

Control and power electronics SPS Installation 4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 Control Electronic Power Unit Filter - 1 pcs. Altera development kit ARRIA V SoC - 1pcs. Motor Inverter. Arcel Filter,Schaffner - 1 pcs. Mezzanie FMC board, CERN J.Emery - 1Pcs. Mesurement board,CERN L.Timeo - 2pcs. DC bus Power Supply.DeltaElektronika 3U 6U 330*100*165mm = 34.5Kg External Filter BI Day 2017 P.Andersson

Analog-digital board Mezzanine 4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 4) New Electronics Control Electronic Power Unit - 1 pcs. Altera development kit ARRIA V SoC --> 1 pcs.VFC, CERN BI(group) - 1pcs. Motor Inverter. Arcel -- --> 1pcs. Inverter, CERN P.Andersson - 1 pcs. Mezzanine FMC board, CERN J.Emery - 1Pcs. Mesurement board,CERN L.Timeo - 2pcs. DC bus Power Supply.DeltaElektronika -- --> 1 pcs.Cap.charger, CERN P.Andersson Sinus Filter Capacitor 6U, ≈ 17Kg VFC Inverter board Analog-digital board Mezzanine Capacitor Charger BI Day 2017 P.Andersson

Prototype Inverter IGBT Vce = 600V, IC = 60A(200A peak) 4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 Prototype Inverter IGBT Vce = 600V, IC = 60A(200A peak) 8-30 kHz Switching Frequency BI Day 2017 P.Andersson

4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 Thermal Simulation in Ltspice of one of the IGBT in the inverter protype. PWM = 16kHz, Duty cycle 50%. 100ms PWM seq. per sec. Filter 250 m Cable Motor 300Vdc BI Day 2017 P.Andersson

Simulation LTspice Junction temperature We have a in and out Seq. Ambient Temperature BI Day 2017 P.Andersson

4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 Temperature measure points on prototype board with same motor used in SPS Orange dot = Temperature Sensor placement BI Day 2017 P.Andersson

Speed Motor 200Rad/s, 1 Scan/s 4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 Speed Motor 200Rad/s, 1 Scan/s BI Day 2017 P.Andersson

Speed Motor 200Rad/s, 1 Scan/s No active cooling 4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 Speed Motor 200Rad/s, 1 Scan/s No active cooling BI Day 2017 P.Andersson

Dspace Measurement 4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 BI Day 2017 P.Andersson

4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 Inverter Key Features Upgraded for 600V DC Bus, Safety CPLD, Current and Voltage measurement. VCES = 600V, IC = 60A(200A peak). Tc = 100 °C, Tj = 175 °c Current measurement 100A rms Voltage measurement 500 Vdc CPLD with SPI Interface Start up Sequens for DC/DC, to prevent high inrush current. Preventions of turning High and Low ”leg” on at the same time, No short circuit. Control of capacitor charger. Sending back status to mezzanie board. BI Day 2017 P.Andersson

Capacitor Charger Key Features Charge any size of capacitor Up 500V 4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 Capacitor Charger Key Features Charge any size of capacitor Up 500V AC/DC, for 28V, 18A BI Day 2017 P.Andersson

VFC + MEZZANINE VFC in standalone mode. 4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17 VFC + MEZZANINE VFC in standalone mode. VFC and mezzanine, using FMC extender. None standard FMC mezzanine shape due to the numerous components. BI Day 2017 P.Andersson 3Q17

Dspace + inverter with motor Firmware Motion Control + Safety CPLD 5) Schedule Test Inverter Test Mezzanine Board Test Cap.Charger Pre Mech. assembly Assembly Delivery Preparation of series prod. 2017 Jun Jul Aug Sep Oct Nov Dec 2018 Control and power electronic test Dspace + inverter with motor Long run test Firmware Motion Control + Safety CPLD BI Day 2017 P.Andersson

Thank You BI Day 2017 P.Andersson

Additional slides BI Day 2017 P.Andersson

Motion design Courtesy of J.Emery HOME Jerk α IN movement Acceleration OUT movement IN 0 crossing 98mm Speed Position Nominal speed @ beam-wire interaction position ≥ 20 [m/s] Movement limited to π [rad] => Nominal speed reached in π/3 IN and OUT movement ≈ 100ms BI Day 2017 P.Andersson

Installation SPS 2015 VME Filter Control Electronic Power Unit BI Day 2017 P.Andersson 4Q15 1Q16 2Q16 3Q16 4Q16 1Q17 2Q17

One Output BI Day 2017 P.Andersson

BWS discussion on the FPGA platform - J.Emery - 19.05.2016 Filter, simulation BI Day 2017 P.Andersson BWS discussion on the FPGA platform - J.Emery - 19.05.2016

Intelligent drive architecture Analog-digital board Low voltages + DC-BUS Power Measure board Will go to inverter Capacitor Sinus Filter Board inverter BWS control electronics specification : https://edms.cern.ch/document/1318827 BI Day 2017 P.Andersson BWS discussion on the FPGA platform - J.Emery - 19.05.2016

Intelligent drive architecture Analog-digital board Low voltages + DC-BUS Power Measure board Will go to inverter Capacitor Sinus Filter Board inverter BWS control electronics specification : https://edms.cern.ch/document/1318827 BI Day 2017 P.Andersson BWS discussion on the FPGA platform - J.Emery - 19.05.2016

BWS discussion on the FPGA platform - J.Emery - 19.05.2016

Arria SoC kits BI Day 2017 P.Andersson https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-arria-v-soc.html https://www.altera.com/products/boards_and_kits/dev-kits/altera/arria-10-soc-development-kit.html BI Day 2017 P.Andersson