Rapid Prototyping with PLDs 4 th & 7 th October 2005.

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Presentation transcript:

Rapid Prototyping with PLDs 4 th & 7 th October 2005

Contents 1.PLD versus ASIC 2.Definitions: a)Rapid prototyping b)PLD 3.PLD a)Types of PLDs b)How PLDs remember their configuration c)PLD Advantages d)PLD Suppliers e)PLD Programming Languages 4.From Verilog to PLD prototyping

PLD versus ASICs ASICs – Application Specific ICs

DEFINITIONS Rapid Prototyping –“Pencontohsulongan cepat”. –Why do it? Saves cost. To test and verify functionality of a design, before the actual chip is fabricated. PLD –Programmable Logic Device.

PLD A programmable logic device. –Programmed by the customer. An electronic component used to build digital circuits. Has an undefined function at the time of manufacture. –Must be programmed before it can be used in a circuit. PROM and EPROM are also considered a PLD if they contain program codes (not just data).

PLDs A single PLD is able to replace a circuit that consists of a few 7400-series TTL ICs. Function of the PLD is assigned during programming of the device, i.e. configuration. –This function may be changed during reprogramming (reconfiguration) of the PLD.

Programmability of PLD 1.OTP, One-time Programmable PROM –Uses fuse links 2.Re-programmable Able to store logic design in: –EPROM – uv erasable –EEPROM- electrically erasable –SRAM –Flash memory

Types of PLDs 1.SPLD a)PAL (Programmable Array Logic) –The first PLD, introduced by Monolithic Memories, in 1970s. b)PLA (Programmable Logic Array) c)GAL (Generic Array Logic) –Invented by Lattice Semiconductor. 2.CPLD For bigger logic circuits, it can replace thousands, or even hundreds of thousands, of logic gates. 3.FPGA Based on gate-array technology. “Field” – an engineering term for the world outside the factory, i.e. where the customers are.

Which PLD to choose? Based on: –Number of gates available, i.e. device capacity. –Speed. –Cost. –Volatility. –Power consumption. –Number of I/O pins. FPGAs and CPLDs are equally good choices for a particular task.

Which PLD to choose? CPLD: thousands to tens of thousands gates.

Switch Matrix Determines interconnection of logic block with the routing wires.

Max7128S Floorplan

Which PLD to choose? FPGA: tens of thousands to several million gates. Xilinx Virtex – 8 million gates.

Flex10k Floorplan

Interconnection Switch Box The programmable switches will determine whether or not a horizontal line is connected to the vertical line intersecting it. What makes this possible?

FPGA FPGA versus MPGA (Mask Programmable Gate Array). Configuration is volatile, and must be reloaded each time on power-up. –Use external PROM or EPROM to store configuration data. Configuration may be changed if a different functionality is required, via reconfiguration.

FPGA Contains programmable logic blocks, and may include programmable interconnects and switches

FPGA Applications ASIC Prototyping DSP Aerospace and defense systems Medical Imaging Computer Vision Speech Recognition Cryptography Bioinformatics

Other types of PLDs 1.Reconfigurable systems –Microprocessor circuits that contain some fixed functions and other functions that can be altered when the processor is running. –Self-altering systems. –The reconfigured FPGA can even test the host system that it is embedded, i.e. BIST, Built-in Self Test. –Includes “internet reconfigurable logic, IRL”.

Other types of PLDs 2.Flash –An EEPROM chip. –Can erase memory in "in a flash“. –Used for storage modules such as USB drives, digital camera, memory cards and fax machines. –Flash BIOS chips replaced ROM BIOS chips in PCs so that the BIOS could be updated in place (on board) instead of being removed and replaced.

FLASH MEMORY

How PLDs remember their configuration Anti-fuse –Normally open, until a programming current (~5mA) is forced through it. EPROM cells –MOS transistor that is switched on by trapping an electric charge permanently on its gate electrode. The charge remains for many years and can only be removed by exposing the chip to strong ultraviolet (uv) light. EEPROM cells –Also uses MOS transistor, but the charge trapped on the gate electrode is removed by applying a voltage of the opposite polarity. SRAM Flash memory

PLD Advantages New chip designs can be tested and easily modified, without involving expensive photomask costs for chips completed in a semiconductor fab. Memory-based PLDs can be reprogrammed over and over, which allows for working products to be upgraded at the user’s site.

PLD Programming Languages Currently: –Verilog HDL –VHDL (Very High Speed IC HDL) –Altera HDL Used to be: –ABEL –CUPL –PALASM

PLD Suppliers Altera Xilinx Atmel Actel AT&T Lattice Cypress Quicklogic

From Verilog to PLD Prototyping

PLD Programming Functional simulation success? Synthesis – produces netlist, in EDIF (Electronic Design Interchange Format) format. Place & Route – mapping the actual structure described in the netlist onto actual macrocells, interconnections and IO pins of the PLD. This produces a bitstream, i.e. binary data to be loaded onto the FPGA or CPLD.

PLD Programming 1.Uses “device programmer”. 2.Devices that are EEPROM or flash based technology are in-circuit programmable, i.e. the additional circuitry that is required to perform device (re) programming is provided inside the FPGA or CPLD itself. This is done with the aid of a JTAG interface or from on- board embedded processor.

Downloading using the Byteblaster Cable

The Altera UP1 Download Board

Questions 1.Discuss the advantages of using FPGA as compared to standard ICs, like the TTL 7400 series and ASICs. 2.Name other forms of design entries besides HDL. 3.How is non-volatile data held for an FPGA device? 4.What are the advantages and disadvantages of the volatility characteristic of the FPGA? 5.Name applications of reconfigurable hardware.

6.For the Max7128S and Flex10k, a)How many gates does the device has? b)How many I/O pins? c)What is the speed of the device? d)Sketch and label its floorplan with the programmable elements inside it. Tip: Use data sheets which you can obtain from Altera’s website.

What do you think?