1. Field Programmable Gate Arrays
Sharif University of Technology
Department of Computer Engineering
Field Programmable Gate Arrays
Alireza Ejlali

2. FPGA Three elements Regularity Field Programmable Logic Blocks
I/O Blocks
Interconnection wires and switches
Regularity
Two dimensional structure
Field Programmable

3. LUT-Based Logic Cells
LUT is a memory which contains the truth-table of a function.
LUT with n inputs can implement any n-bit function.
Truth-table is placed in LUT during the FPGA programming.
LUTs are implemented with SRAM.

4. LUT Implementations

5. MUX Implementations

6. PLD Programming Technologies
FPGA
One Time Programmable
Anti-fuse
Re-Programmable
SRAM
CPLD
Fuse
EPROM
E2PROM

7. SRAM Logic Blocks (LUT) Storage (Embedded RAM)
Programmable Connections (Routing)
Pass transistor
Transmission gates
Multiplexer

8. Programmable Connections

9. SRAM controlled switches

10. Advantages Disadvantage SRAM Easily changeable High density
Track latest SRAM technology
Disadvantage
Volatile
High Power dissipation

11. Anti-fuse

12. Anti-fuse
Less expensive than SRAM technology
One time programmable