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Design and Frequency Scaling of CMOS VCOs Keith Tang Sorin P. Voinigescu June 9 th, 2006.

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Presentation on theme: "Design and Frequency Scaling of CMOS VCOs Keith Tang Sorin P. Voinigescu June 9 th, 2006."— Presentation transcript:

1 Design and Frequency Scaling of CMOS VCOs Keith Tang Sorin P. Voinigescu June 9 th, 2006

2 Motivation MOSFET DC, HF and noise characteristics are scalable across technology nodes VCO topologies are very simple with one or two transistor half-circuits Is it possible to algorithmically scale and port microwave and mm-wave VCOs as we do CMOS digital logic?

3 Colpitts VCO – Design Procedure 1.Choose L G : small for low phase noise large for low power consumption 2.For given frequency: 3.Set C 1 >> C var for lowest phase noise and maximum tuning range, or C 1 = C var for highest f osc 4.While keeping current density the same (optimal noise current density = 0.15mA/um), size transistor to provide enough negative resistance

4 Frequency Scaling – Colpitts VCO Oscillation frequency is determined by If L G, C 1 and C var are scaled by k, Frequency scaled by the same factor!

5 Example – 10GHz Colpitts VCO

6 Scaling up to 80GHz Values from 10GHz Colpitts:

7 Measurement – 10GHz Colpitts Frequency Range: 9.2 – 10.4GHz (11.8% tuning) Phase Noise: -117.5dBc/Hz@1MHz offset (with 100 averaging)

8 Measurement – 80GHz Colpitts Frequency Range: 73.8 – 80.0GHz (8.1% tuning) Phase Noise: -100.3dBc/Hz@1MHz offset (with 100 averaging)

9 Acknowledgement Nortel ST Microelectronics for fabrication CMC for CAD tools CFI and OIT for test equipment


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