Presentation on theme: "Design and Scaling of SiGe BiCMOS VCOs Above 100GHz"— Presentation transcript:
1 Design and Scaling of SiGe BiCMOS VCOs Above 100GHz S. T. Nicolson1, K.H.K Yau1, K.A. Tang1, P. Chevalier2, A. Chantre2 B. Sautreuil2, and S. P. Voinigescu11) Edward S. Rogers Sr. Dept. of Elec. & Comp. Eng., Univ. of Toronto2) STMicroelectronics
2 Outline Motivation for W-band SiGe integrated circuits VCO design methodology for low phase noise in W-bandLayout considerationsMeasurement resultsConclusions and future work
3 Motivation for W-band SiGe ICs Typical applications: 77GHz auto radar, 94GHz weather radar, imagingCentral to these applications is the low phase noise VCOProcess development: NFmin, Rn & Ysopt difficult to measure in W-bandUse VCO as a process monitor for the noise performance of SiGe technologiesExplore VCO scaling/yield in SiGeUnder imaging, mention: security, medical, passive, also mention that applications are few – we need to be creative in finding new ones!We are using the LC-VCO as a process monitor, kind of like the ring oscillator is used.
4 Add negative Miller capacitors Differential tuning VCO TopologyCMVCCLBCextCvarQ1VTUNE+VTUNE-LEEREECEELCVBB2.5 VNo cascodelower phase noise, lower supply voltageColpitts topologymaximize fosc relative to other topologiesAugment Cbe with CextReduces phase noiseAdd negative Miller capacitorsIncreases fosc by cancelling CmDifferential tuningreduces supply induced noise24mAVTUNEStress single design and layout, with differing technologies (emitter width and layers). Minimal possible differences between VCOs in vastly different technologies.RBrpcpbibECBCext
5 W-Band VCO Design Methodology Use smallest realizable LB with adequate QGiven fosc, maximize tuning range using large CextNegative resistancePhase noise formulaPhase noise trade-off when HBT pushed to limitMinimize HBT noise bias at NFmin current densityMaximize Vtank and Cext bias at peak fT current densityMax. Rneg occurs at peak fT/fMAX biasSince the technologies have the same BEOL, the only tech. dependent design step is finding NFmin bias. This is easily adjusted during testing by means of a DC control voltage.
6 VCO Fabrication Fabricated in three technology splits: All VCO layouts and bias currents are identical – no redesignDirectly compare VCOs fabricated in different processesUse the VCO to optimize HBT profileNoise parameters from phase noisefMAX from VCO output powerBiC9 fT = 150GHz fMAX = 160GHzemitter 4×5mm×0.17mmBipX fT = 230GHz fMAX = 300GHzemitter 4×5mm×0.13mmBipX1 fT = 270GHz fMAX = 260GHzemitter 4×5mm×0.13mmStress single design and layout, with differing technologies (emitter width and layers). Minimal possible differences between VCOs in vastly different technologies.
7 VCO Layout VCO core area: 100mm × 100mm Spiral inductors where necessary to reduce areaPlenty of supply decoupling (MiM and metal-metal)70mm100mm
8 Technology Overview – fT/fMAX Scaling Peak fT/fMAX current density increases at each technology node0.17mm SiGe JpeakfT = 7mA/mm2 where fT = 150GHz0.13mm SiGe JpeakfT = 14mA/mm2 where fT = 230GHz (or 250GHz)Contrast with CMOS…JpfT = 0.3mA/mm, JpfMAX = 0.2mA/mm, JNFmin = 0.15mA/mm for nm nodesNeed a plot showning fmax and ft as functions of current density for BiC9, BipX, and BipXF. Make sure that the pfT and pfMAX values agree with the paper and presentation text! fT increase by sqrt(2), JpfT doubles.
10 Performance Comparison Across Technology BiCMOS9 MOS var.BiCMOS9 HBT var.BipX HBT var.BipX1 HBT var.Tech. fT/fMAX(GHz)150/160230/300250/260Differential Pout (dBm)+0.7-1.3+2.7+2.5SSB 1MHz (dBc/Hz)-101.6-80-98-101.3Osc. Freq. (GHz)96100106104LC-oscillator frequency insensitive to technology fT/fMAXMOS varactors give less phase noise than HBT (CBC) varactorsHigher fMAX more output power, higher frequencyBipX1 results in lowest phase noiseState when presenting that this is an issue in CMOS too, because fT and fMAX are so layout dependent. This proves that you have to optimize the transistor layout and metallization for both fT and fMAX.
11 Phase Noise Performance Oscillation frequency of 104GHzPhase noise of 1MHz offsetPhase Noise in W-Band SiGe VCOsFMCW modulationAveraged Spectral PlotPoint out we’re claiming best phase noise, not necessarily best FOM – we’ll talk about that later.**References provided in abstract**
12 Biasing W-Band VCOs for Low Noise NFmin current density scales with technology and foscEmitter width JNFmin (scales with JpeakfT)Frequency JNFmin (gets closer to JpeakfT)Noise correlation further increases JNFmin [K. Yau, SiRF, 2006]cpbibCRBEB<inB><inC>The B and C shot noise currents are correlatedNeed to say something on this slide about WHY JNFmin goes higher with tech. and freq.How exactly were the NFmin curves generated??????? from measured Y parameters how is this done? Read Ken’s paper!
13 Phase Noise Performance Across Bias What is the minimum phase noise current density in W-band VCOs?Measure output power and phase noise w.r.t current density (vary VBB)Looks like phase noise is minimum at peak fT current densityphase noiseJNFMIN increaseswith frequencyoutput powerCMVCCLBCextCvarQ1VTUNE+VTUNE-LEEREECEELCVBB2.5 V
14 W-Band Manufacturability Challenges Manufacturability specifications for automotive radar are stringentOutdoors wide temperature variationsMust last for car’s lifetimeLow cost per part requires high yieldIs SiGe on the way to meeting such challenges?25ºC70ºC50ºC125ºCBiC9MOS var.HBT var.BipX
15 Wafer Mapping – BiCMOS9 Tested 120 VCOs on 4 wafers Summary of BiC9 VCOs with MOS varactors (60 dice averaged)Summary of BiC9 VCOs with HBT varactors (60 dice averaged)4 VCOs had significantly below average performance (outliers)2 of the 4 outlier VCOs failed to oscillate entirelyWafer1234Center freq. (GHz)94.794.995.0Tuning range (GHz)4.6Output power (dBm)0.20.70.60.8DC power (mW)133.8133.2137.3132.6Wafer1234Center freq. (GHz)99.6100.5100.1Tuning range (GHz)188.8.131.52Output power (dBm)-1.1-1-1.4-0.9DC power (mW)133.0136.2132.8
16 Wafer Mapping – BipX Oscillation Frequency Phase Noise at 1MHz offset VCO not presentDie not tested< -98 dBc/Hz-95 – -98 dBc/Hz-92 – -95 dBc/Hz> -92 dBc/HzOscillation FrequencyPhase Noise at 1MHz offsetGHzGHzGHzGHzWafer flatLocation of VCO in reticule
17 Figures of MeritComparison of our work to other state of the art W-Band VCOsReferences  Huang P. et al, ISSCC  Kobayashi K. W. et al, JSSC 1999 Tang K. W. et al. CSICS  Huang P. et al, ISSCC 2006
18 ConclusionsDemonstrated a design methodology for low phase noise in W-Band VCOsBiasing at JpeakfT minimizes phase noise in W-band VCOsPerformed a direct comparison of identical VCOs fabricated in different technologiesLC-oscillator frequency is insensitive to technology scalingHigher fT technology yielded VCO with lower phase noiseHigher fMAX technology yielded VCO with improved output powerFuture work is required to fully support these conclusionsNoise figure measurements in the W-Band (correlate to Y-parameter method)Verify JNFmin in the W-Band and support biasing near JpeakfT for min. phase noise
19 Technology Overview – fT/fMAX Scaling Improvement in peak fT/fMAX has two contributionsLayout stripe contact, decreased emitter width 0.17mm to 0.13mVertical profile and processing doping, materials, epitaxy, etc.How much of the speed improvement is due to each contribution?Measure the 0.13mm HBT layouts fabricated in the 0.17mm processScaling the emitter width alone doesn’t change current density for peak fT, but does improve speed.
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