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© Sean Nicolson, BCTM 2006 Design and Scaling of SiGe BiCMOS VCOs Above 100GHz S. T. Nicolson 1, K.H.K Yau 1, K.A. Tang 1, P. Chevalier 2, A. Chantre 2 B. Sautreuil 2, and S. P. Voinigescu 1 1) Edward S. Rogers Sr. Dept. of Elec. & Comp. Eng., Univ. of Toronto 2) STMicroelectronics

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© Sean Nicolson, BCTM 2006 Outline Motivation for W-band SiGe integrated circuits VCO design methodology for low phase noise in W-band Layout considerations Measurement results Conclusions and future work

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© Sean Nicolson, BCTM 2006 Motivation for W-band SiGe ICs Typical applications: 77GHz auto radar, 94GHz weather radar, imaging –Central to these applications is the low phase noise VCO Process development: NF min, R n & Y sopt difficult to measure in W-band –Use VCO as a process monitor for the noise performance of SiGe technologies Explore VCO scaling/yield in SiGe

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© Sean Nicolson, BCTM 2006 VCO Topology No cascode – lower phase noise, lower supply voltage Colpitts topology – maximize f osc relative to other topologies Augment C be with C ext – Reduces phase noise Add negative Miller capacitors – Increases f osc by cancelling C Differential tuning – reduces supply induced noise 24mA CMCM V CC LBLB C ext C var Q1Q1 V TUNE+ V TUNE- L EE R EE C EE LCLC V BB 2.5 V V TUNE RBRB r c i b E CB C ext

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© Sean Nicolson, BCTM 2006 W-Band VCO Design Methodology Use smallest realizable L B with adequate Q Given f osc, maximize tuning range using large C ext Negative resistance Phase noise formula Phase noise trade-off when HBT pushed to limit –Minimize HBT noise bias at NF min current density –Maximize V tank and C ext bias at peak f T current density Max. R neg occurs at peak f T /f MAX bias

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© Sean Nicolson, BCTM 2006 VCO Fabrication Fabricated in three technology splits: All VCO layouts and bias currents are identical – no redesign Directly compare VCOs fabricated in different processes Use the VCO to optimize HBT profile –Noise parameters from phase noise –f MAX from VCO output power BiC9 f T = 150GHz f MAX = 160GHz emitter 4×5 m×0.17 m BipX f T = 230GHz f MAX = 300GHz emitter 4×5 m×0.13 m BipX1 f T = 270GHz f MAX = 260GHz emitter 4×5 m×0.13 m

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© Sean Nicolson, BCTM 2006 VCO Layout VCO core area: 100 m × 100 m Spiral inductors where necessary to reduce area Plenty of supply decoupling (MiM and metal-metal) 70 m 100 m

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© Sean Nicolson, BCTM 2006 Technology Overview – f T /f MAX Scaling Peak f T /f MAX current density increases at each technology node –0.17 m SiGe J peakfT = 7mA/ m 2 where f T = 150GHz –0.13 m SiGe J peakfT = 14mA/ m 2 where f T = 230GHz (or 250GHz) Contrast with CMOS… –J pfT = 0.3mA/ m, J pfMAX = 0.2mA/ m, J NFmin = 0.15mA/ m for nm nodes

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© Sean Nicolson, BCTM 2006 Measurement Results VCO performance comparison in 3 SiGe technologies Phase noise performance Temperature testing Wafer mapping

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© Sean Nicolson, BCTM 2006 Performance Comparison Across Technology LC-oscillator frequency insensitive to technology f T /f MAX MOS varactors give less phase noise than HBT (C BC ) varactors Higher f MAX more output power, higher frequency BipX1 results in lowest phase noise BiCMOS9 MOS var. BiCMOS9 HBT var. BipX HBT var. BipX1 HBT var. Tech. f T /f MAX (GHz) 150/ /300250/260 Differential Pout (dBm) SSB 1MHz (dBc/Hz) Osc. Freq. (GHz)

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© Sean Nicolson, BCTM 2006 Phase Noise Performance Oscillation frequency of 104GHz Phase noise of 1MHz offset Averaged Spectral Plot Phase Noise in W-Band SiGe VCOs **References provided in abstract** FMCW modulation

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© Sean Nicolson, BCTM 2006 Biasing W-Band VCOs for Low Noise NF min current density scales with technology and f osc –Emitter widthJ NFmin (scales with J peakfT ) –FrequencyJ NFmin (gets closer to J peakfT ) –Noise correlation further increases J NFmin [K. Yau, SiRF, 2006] The B and C shot noise currents are correlated c i b C RBRB E B i nB i nC

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© Sean Nicolson, BCTM 2006 phase noise J NFMIN increases with frequency output power CMCM V CC LBLB C ext C var Q1Q1 V TUNE+ V TUNE- L EE R EE C EE LCLC V BB 2.5 V Phase Noise Performance Across Bias What is the minimum phase noise current density in W-band VCOs? Measure output power and phase noise w.r.t current density (vary V BB ) Looks like phase noise is minimum at peak f T current density

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© Sean Nicolson, BCTM ºC 70ºC 25ºC 50ºC 125ºC 70ºC 25ºC BiC9 MOS var. BiC9 HBT var. BipX W-Band Manufacturability Challenges Manufacturability specifications for automotive radar are stringent –Outdoors wide temperature variations –Must last for cars lifetime –Low cost per part requires high yield Is SiGe on the way to meeting such challenges?

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© Sean Nicolson, BCTM 2006 Wafer Mapping – BiCMOS9 Wafer1234 Center freq. (GHz) Tuning range (GHz)4.6 Output power (dBm) DC power (mW) Wafer1234 Center freq. (GHz) Tuning range (GHz) Output power (dBm) DC power (mW) Tested 120 VCOs on 4 wafers Summary of BiC9 VCOs with MOS varactors (60 dice averaged) Summary of BiC9 VCOs with HBT varactors (60 dice averaged) 4 VCOs had significantly below average performance (outliers) 2 of the 4 outlier VCOs failed to oscillate entirely

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© Sean Nicolson, BCTM 2006 Wafer Mapping – BipX VCO not present Die not tested < -98 dBc/Hz -95 – -98 dBc/Hz -92 – -95 dBc/Hz > -92 dBc/Hz Oscillation Frequency Phase Noise at 1MHz offset VCO not present Die not tested GHz GHz GHz GHz Wafer flat Location of VCO in reticule

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© Sean Nicolson, BCTM 2006 Figures of Merit Comparison of our work to other state of the art W-Band VCOs References [1] Huang P. et al, ISSCC 2006 [2] Kobayashi K. W. et al, JSSC 1999 [3] Tang K. W. et al. CSICS 2006 [4] Huang P. et al, ISSCC 2006

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© Sean Nicolson, BCTM 2006 Conclusions Demonstrated a design methodology for low phase noise in W-Band VCOs –Biasing at J peakfT minimizes phase noise in W-band VCOs Performed a direct comparison of identical VCOs fabricated in different technologies –LC-oscillator frequency is insensitive to technology scaling –Higher f T technology yielded VCO with lower phase noise –Higher f MAX technology yielded VCO with improved output power Future work is required to fully support these conclusions –Noise figure measurements in the W-Band (correlate to Y-parameter method) –Verify J NFmin in the W-Band and support biasing near J peakfT for min. phase noise

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© Sean Nicolson, BCTM 2006 Technology Overview – f T /f MAX Scaling Improvement in peak f T /f MAX has two contributions –Layout stripe contact, decreased emitter width 0.17 m to 0.13 –Vertical profile and processing doping, materials, epitaxy, etc. How much of the speed improvement is due to each contribution? –Measure the 0.13 m HBT layouts fabricated in the 0.17 m process

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