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Institut für Theoretische Elektrotechnik Dipl.-Ing. Jan Bremer Large Signal Modeling of Inversion-Mode MOS Varactors in VCOs MOS-AK Meeting April 2009 at IHP in Frankfurt (Oder)

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page 2 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Overview Motivation Large Signal Modeling of Varactors in VCOs Alternative Modeling Concept Simulation Results Conclusion

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page 3 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Motivation Tail-biased differential LC Tank VCO MOS varactor Tuning range CV-characteristic

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page 4 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling D=S=B MOS Varactor R. L. Bunch and S. Raman, Large- Signal Analysis of MOS Varaktors in CMOS – G m LC VCOs Structure and CV-characteristic Strongly nonlinear tuning characteristic Advantages: Made from standard MOS-cell Falling and rising edge of the CV- characteristic can be used Disadvantages: Source-Drain-Bulk are short-circuited and connected to V tune

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page 5 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Accumulation Mode MOS Varactor R. L. Bunch and S. Raman, Large- Signal Analysis of MOS Varaktors in CMOS – G m LC VCOs Structure and CV-characteristic Not made from standard MOS-cell Nonlinear tuning characteristic Advantages: Wider transition from C min to C max as inversion mode varactors Best C max / C min ratio Lowest parasitic resistance Disadvantages: the p + regions of drain and source are replaced with n + regions

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page 6 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Inversion Mode MOS Varactor Structure and CV-characteristic R. L. Bunch and S. Raman, Large-Signal Analysis of MOS Varaktors in CMOS – G m LC VCOs Very sharp transition from C min to C max Susceptible to induced substrat noise Advantages: Made from standard MOS-cell Best linearity Disadvantages: Source-Drain are short-circuited and Bulk is connected to supply voltage (PMOS) or ground (NMOS)

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page 7 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Overview Motivation Large Signal Modeling of Varactors in VCOs Alternative Modeling Concept Simulation Results Conclusion

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page 8 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Varactors incorporated into VCOs V tune =1 V V DD =2,5 V V tank (t)

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page 9 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Large Signal Varactor Modeling after R. L. Bunch Expression for C(v(t)) is needed Averaging is subject for debate Neglecting the higher harmonics Amplitude of the output signal of the VCO is needed R. L. Bunch and S. Raman, Large-Signal Analysis of MOS Varaktors in CMOS – G m LC VCOs Gate voltage Capacitance A=0.1 V A=1.0 V A=0.5 V Small-Signal

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page 10 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Large Signal Varactor Modeling after A. Abidi I C eff Fundamental Harmonics Kirchhoff and tank voltage as Fourier series: Oscillating capacitance as Fourier series: Complete inductor and capacitor current: Comparing coefficients at every frequency gives: E. Hegazi and A. A. Abidi, Varactor Characteristics, Oscillator Tuning Curves, and AM-FM Conversion

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page 11 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Large Signal Varactor Modeling after A. Abidi II Expression for C(v(t)) is needed Includes only 1st and 2nd harmonic of the nonlinear varactor characteristic Includes only the fundamental of the voltage, higher harmonics are neglected Amplitude of the output signal of the VCO is needed Graphical ansatz to calculate C eff : Small signal capacitance approximated with a step function: E. Hegazi and A. A. Abidi, Varactor Characteristics, Oscillator Tuning Curves, and AM-FM Conversion

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page 12 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Overview Motivation Large Signal Modeling of Varactors in VCOs Alternative Modeling Concept Simulation Results Conclusion

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page 13 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Differential Equation System for a VCO C(V t ) Tank resistance: A.Bunomo, „Determining the Oscillation of differential VCOs“, 2003 Current of the differential pair: Equivalent circuit of the inductor:

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page 14 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Intrinsic Capacitance Model based on EKV C. Enz, F. Krummenacher and E. Vittoz, ”An Analytical MOS Transistor Model Valid in All Regions of Operation and Dedicated to Low-Voltage and Low-Current Applications”, Analog Integrated Circuits and Signal Processing, Kluwer, 1995 Interpolation function: With: Interpolated intrinsic capacitances: Gate Voltage Normalized Capacitances C gb C gs / C gd C bs / C bd NMOS transistor Width = 100 µm V tune = 0V

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page 15 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Voltage dependant Varactor Capacitance 00 NMOS PMOS 00 Gate Voltage Capacitance

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page 16 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Simulation Results with IHP SGB25 Technology NMOS transistor Width = 100 µm V tune = 0V Capacitance Gate Voltage

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page 17 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Effective Large Signal Capacitance V tank (t) Assuming complete symmetry between the two MOS-varactors: Complete varactor capacitance is a series connection of two MOSFETs:

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page 18 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Overview Motivation Large Signal Modeling of Varactors in VCOs Alternative Modeling Concept Simulation Results Conclusion

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page 19 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Effective Large Signal Capacitance Capacitance Gate Voltage V DD =2.5 V NMOS transistor Width = 250 µm V tune = 0.9V V tank (t) Tank Amplitude Capacitance

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page 20 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Effective Large Signal Capacitance Capacitance Gate Voltage V DD =2.5 V NMOS transistor Width = 250 µm V tune = 1.5V V tank (t) Tank Amplitude Capacitance

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page 21 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Effective Large Signal Capacitance Tank Amplitude Capacitance Tank Amplitude V tune = 0.2 V V tune = 0.4 V V tune = 0.6 V V tune = 0.8 V V tune = 1.0 V V tune = 2.0 V V tune = 1.8 V V tune = 1.6 V V tune = 1.4 V NMOS transistor Width = 250 µm

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page 22 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Dimensioning Varactors in the VCO Design Process Design of a 2.4 GHz LC Tank VCO with 20 percent tuning range Time [ns] Tank amplitude [V]

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page 23 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Overview Motivation Large Signal Modeling of Varactors in VCOs Alternative Modeling Concept Simulation Results Conclusion

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page 24 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling Conclusion An implementation of an analytical small signal capacitance model for inversion mode MOS varactors based on the EKV model was presented Simulation results for the small signal capacitance are in good accordance to simulation results that were obtained by using Spectre simulator If the varactors are incorporated into a VCO a large signal analysis of the varactor capacitance is needed Two well-established large signal varactor capacitance modeling concepts have been presented and analyzed An alternative capacitance model in dependency of the output signal of the VCO including higher harmonics was presented Using this nonlinear modeling approach it is possible to set up a complete nonlinear VCO model that is only dependant of circuit and process parameters Goal: Parameter optimization in advance of the actual design flow

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page 25 Institut für Theoretische Elektrotechnik Jan Bremer Large Signal Capacitance Modeling The End Thank you for your attention!

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