Presentation on theme: "April 12-13, 2003 SSoCC 1 Design of an LC-VCO with One Octave Tuning Range Andreas Kämpe and Håkan Olsson Radio Electronics-LECS/IMIT Royal Institute of."— Presentation transcript:
April 12-13, 2003 SSoCC 1 Design of an LC-VCO with One Octave Tuning Range Andreas Kämpe and Håkan Olsson Radio Electronics-LECS/IMIT Royal Institute of Technology (KTH)
April 12-13, 2003 SSoCC 2 Introduction VCO research has largely focused on reducing phase noise, not tuning range. Multi standard transceivers requires wideband VCOs with low phase noise Goal: Designing a VCO with one octave tuning range while maintaining a low phase noise and low power consumption.
April 12-13, 2003 SSoCC 3 VCO topologies LC tank + Low phase-noise. + Low power consumption - Large chip area - Tuning range (limited by C MAX /C MIN ). Delay element Ring, transmission line, and relaxation oscillators + Small chip area - High phase noise and realativly high power consumption.
April 12-13, 2003 SSoCC 4 VCO Architecture Complementary structure (N & P) MOS => larger amplitude and symetric rise/fall time => Reduced power / phase noise
April 12-13, 2003 SSoCC 5 LC-tank and wide tuning range One octave tuning range => Requires a Capacitance tuning of 2 octaves. - Tuning capacitor C max / C min > 4 (paracitcs: C P ) - Low voltage and large Cmax/Cmin => High varactor sensitivity (VCO gain) => sensitive to noise on the control line.
April 12-13, 2003 SSoCC 6 Discrete tuning Bandswitching The switched capacitors are used as band selectors (coarse tuning) Channel selection is performed digitally. + Increased tuning range + Reduces the varactor gain => phase noise reduction. CMOS technology offers excellent switches.
April 12-13, 2003 SSoCC 7 Switch limitations (MOSFET) Low capacitive load Large tuning range Minimum loss Low power consumption
April 12-13, 2003 SSoCC 8 Trade-off Loss or capacitive load. Minimum capacitive load = reduce Cgs /Cgd = narrow transistor with minimum gate length. Minimum loss = reduce Rds-on = wide transistor with minimum gate length.
April 12-13, 2003 SSoCC 9 Switch Optimisation NMOS transistors (higher transconductance). Drain / source are AC coupled (band sw cap) and biased via resistors => maximizes (Vgs-Vt) => Reduced Rds-on
April 12-13, 2003 SSoCC 10 Switch On Switch on: V gs = 1.8 V => Minimum R DS
April 12-13, 2003 SSoCC 11 Switch Off Switch off: V gs = -1.8 V => 20% reduction in capacitance compared to having Drain and Source biased at 0 V.
April 12-13, 2003 SSoCC 13 Varactor Accumulation-mode mos varactors => Less steep voltage to capacitance transfer. 4 varactors are conected anti parallell => Differential operation and control => Common mode rejection
April 12-13, 2003 SSoCC 14 Inductor + Differential inductor (increased coupling). + 3 metal layers (M6, M5, M4) are stacked on top of each other => reduces the series resistance. => increased Q - Increased capacitive load (Lower metal layers are closer to the substrate).
April 12-13, 2003 SSoCC 15 Inductor simulations Optimized and designed with ASITIC and ADS.
April 12-13, 2003 SSoCC 16 Inductor model Lumped model of a transmission line.
April 12-13, 2003 SSoCC 17 Inductor-model simulations Lumped model error Real(S).
April 12-13, 2003 SSoCC 18 Inductor-model simulations Lumped model error Imag(S).
April 12-13, 2003 SSoCC 19 Amplitude Variations The oscillation amplitude varies considerably across the wide tuning range Requires an adjustable negative resistance => Achieved by controlling the biasing current.
April 12-13, 2003 SSoCC 20 VCO The band selection also controlles the biasing current. => Constant oscillation amplitude over the entire tuning range.
April 12-13, 2003 SSoCC 21 Tuning range Large tunability 1.2 GHz – 2.6 GHz.
April 12-13, 2003 SSoCC 22 VCOs VCO Tech [um] Tuning range [%] FOM [dBc/Hz] A 5.9 GHz Voltage-Controlled Ring Oscillator in 0.18 μm CMOS, IEEE J. Solid-State Circuits 39, pp , Jan A 1.8 GHz higly-tunable low phase-noise CMOS VCO. Custom Integrated Circuits Conference, CICC. Proceedings of the IEEE 2000, pp May New wideband/dualband CMOS LC voltage-controlled oscillator. Circuits, Devices and Systems, VOl 150. Proceedings of the IEEE 2003, pp Oct * A 15-mW Fully Integrated I/Q Synthesizer for Bluetooth in 0.18 μm CMOS, IEEE J. Solid-State Circuits 38, pp , July * Design of Wide-Band CMOS VCO for Multiband Wireless LAN Applications, IEEE J. Solid-State Circuits 38, pp , August SOI This * Quadrature VCO
April 12-13, 2003 SSoCC 23 Conclusions It is possible for a VCO to have a large tuning range combined with a low phase noise and low power consumption. This design has a very good performance expressed in FOM (-190 dBc/Hz/mW) and superior if the wide tuning range is taken in account. Large chip Area, due to many capacitors and a large inductor. If the oscillator was designed to be operated at a higer frequency, the Chip area could be decreced (smaller LC tank) The down side is an increaced loss in the switches (capacitor array).
April 12-13, 2003 SSoCC 24 Complementary or NMOS-only 1 I D(n + p) = I D(n-only) Equal g m : g m(n + p) = g m(n-only)
April 12-13, 2003 SSoCC 25 Complementary or NMOS-only 2 Symetric rise/fall time: