1. 1 Area-reducing Sharing of Mutually Exclusive Multiplier, MAC, Adder and Subtractor blocks Sabyasachi Das Synplicity Inc Sunil P. Khatri Texas A&M University

2. 2 The Problem Statement z p = a * b a b q = c * d + e c e p q d r = f + g f g r t = h - k h k t 4-to-1 MUX s0s0 s1s1 This is an example of a generalized sharing problem involving multiple arithmetic Sum-of-Product blocks This is an example of a generalized sharing problem involving multiple arithmetic Sum-of-Product blocks Goal: Design a shared area-efficient architecture Goal: Design a shared area-efficient architecture

3. 3 What is a Sum-of-Product? IC block that performs addition of multiple product and sum terms IC block that performs addition of multiple product and sum terms Computationally-intensive Computationally-intensive Consumes large area Consumes large area Wide usage in DSP, Graphics, Microprocessors Wide usage in DSP, Graphics, Microprocessors p = a * b q = c * d d z = p + q + e + f e f z p q cb a

4. 4 Examples of Sum-of-Product Blocks Multiplication { assign z = a * b} Multiplication { assign z = a * b} MAC { assign z = (a * b) + c} MAC { assign z = (a * b) + c} 2-operand Addition { assign z = a + b} 2-operand Addition { assign z = a + b} Squarer{ assign z = a * a} Squarer{ assign z = a * a} Adder-Tree{ assign z = a + b + c + d} Adder-Tree{ assign z = a + b + c + d} Generalized SOP { assign z = (a * b) + (c * d) + (e * f) + g + h + k} Generalized SOP { assign z = (a * b) + (c * d) + (e * f) + g + h + k}

5. 5 Structure of Sum-of-Products Sum-of-Products block consists of 3 parts (written in the order of data-flow) Sum-of-Products block consists of 3 parts (written in the order of data-flow) Partial Product Generator (PPGen) Partial Product Generator (PPGen) Partial Product Reduction Tree (PPRT) Partial Product Reduction Tree (PPRT) Final Carry-Propagation Adder (CPA) Final Carry-Propagation Adder (CPA) Partial Product Generator (PPGen) Partial Product Reduction Tree (PPRT) Final Carry Propagation Adder (CPA) Inputs Output

6. 6 PPGen for one Product in an SOP a 3 a 2 a 1 a 0 * b 3 b 2 b 1 b 0 a 3 b 0 a 2 b 0 a 1 b 0 a 0 b 0 a 3 b 1 a 2 b 1 a 1 b 1 a 0 b 1 a 3 b 1 a 2 b 1 a 1 b 1 a 0 b 1 a 3 b 2 a 2 b 2 a 1 b 2 a 0 b 2 a 3 b 2 a 2 b 2 a 1 b 2 a 0 b 2 a 3 b 3 a 2 b 3 a 1 b 3 a 0 b 3 a 3 b 3 a 2 b 3 a 1 b 3 a 0 b 3 PPGen of each Product-term in an SOP generates its own partial product vectors

7. 7 PPRT and CPA (a*b) + (c * d) + e +f _________________________ (a*b) + (c * d) + e +f _________________________ a 3 b 0 a 2 b 0 a 1 b 0 a 0 b 0 a 3 b 0 a 2 b 0 a 1 b 0 a 0 b 0 a 3 b 1 a 2 b 1 a 1 b 1 a 0 b 1 a 3 b 1 a 2 b 1 a 1 b 1 a 0 b 1 … … … … … … c 3 d 0 c 2 d 0 c 1 d 0 c 0 d 0 c 3 d 0 c 2 d 0 c 1 d 0 c 0 d 0 c 3 d 1 c 2 d 1 c 1 d 1 c 0 d 1 c 3 d 1 c 2 d 1 c 1 d 1 c 0 d 1 … … … … … … e 3 e 2 e 1 e 0 e 3 e 2 e 1 e 0 f 3 f 2 f 1 f 0 f 3 f 2 f 1 f 0 _________________________ _________________________ …… … x 5 x 4 x 3 x 2 x 1 x 0 …… … y 5 y 4 y 3 y 2 y 1 y 0 All partial products (from product and sum terms) are combined together All partial products (from product and sum terms) are combined together Single PPRT reduces these to two vectors Single PPRT reduces these to two vectors Final Adder (CPA) adds to produce the output Final Adder (CPA) adds to produce the output

8. 8 Our Proposed Approach Identify the similarity between all the operations Identify the similarity between all the operations Identify the largest SOP block among all involved blocks Identify the largest SOP block among all involved blocks Implement the largest block Implement the largest block Reuse different parts of the largest block (with MUXes) to implement other smaller SOP blocks Reuse different parts of the largest block (with MUXes) to implement other smaller SOP blocks

9. 9 Adder and Subtractor Adder and Subtractor are similar operations Adder and Subtractor are similar operations z = a - b a b z z = a + b a b z Inv 1’b1 b

10. 10 MAC and Multiplier MAC and Multiplier are similar operations MAC and Multiplier are similar operations Both contain PPGen, PPRT, CPA Both contain PPGen, PPRT, CPA Both are specific cases of SOP Both are specific cases of SOP For a Multiplier (a*b) with n-bit wide input signals, there are n rows of partial products For a Multiplier (a*b) with n-bit wide input signals, there are n rows of partial products For a MAC (c*d+e) with n-bit wide input signals, there are (n+1) rows of partial products For a MAC (c*d+e) with n-bit wide input signals, there are (n+1) rows of partial products

11. 11 Proposed Approach of Sharing Each of the 4 operations are specific examples of generalized Sum-of-Products Each of the 4 operations are specific examples of generalized Sum-of-Products Implement the shared architecture with MUXes Implement the shared architecture with MUXes

12. 12 Results On an average, 34.5% smaller than the result of the commercial Datapath Synthesis tool

13. 13 Results If most or all the blocks have similar complexity (like, Multiplier, MAC, Squarer, Constant-Mult), that will result in more area savings (as high as 55%-60% area savings in this new example). If most or all the blocks have similar complexity (like, Multiplier, MAC, Squarer, Constant-Mult), that will result in more area savings (as high as 55%-60% area savings in this new example). z p = a * b a b q = c * d + e c e p q d r = f * g f g r t = h * const h const t 4-to-1 MUX s0s0 s1s1

14. 14 Results If most or all the blocks have same input signals, that will result in more area savings (as high as 60%-70% area savings in this new example). If most or all the blocks have same input signals, that will result in more area savings (as high as 60%-70% area savings in this new example). z p = a * b a b q = a * b + c a c p q b r = a * b a b r t = a * const a const t 4-to-1 MUX s0s0 s1s1

15. 15 Results If there are more mutually exclusive SOP blocks, that will result in more area savings (as high as 70%-80% area savings in this new example of 8 similar SOPs). If there are more mutually exclusive SOP blocks, that will result in more area savings (as high as 70%-80% area savings in this new example of 8 similar SOPs). z SOP 1 Inputs pq t 8-to-1 MUX s0s0 s1s1 s2s2... Inputs SOP 2 Inputs SOP 7

16. 16 Thank you