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1 ECE 4436ECE 5367 Computer Arithmetic I-II

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2 ECE 4436ECE 5367 Addition concepts 1 bit adder –2 inputs for the operands. –Third input – carry in from a previous addition/adder –Single bit output for the sum. –Second output to pass on the carry.

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3 ECE 4436ECE 5367 Concepts I/P output specification – 1 bit adder Input s Output s abCarry in Carry out SumComments 000000 + 0+ 0 = 00 two 001010 + 0+ 1 = 01 two 010010 + 1+ 0 = 01 two 011100 + 1+ 1 = 10 two 100011 + 0+ 0 = 01 two 101101 + 0+ 1 = 10 two 110101 + 1+ 0 = 10 two 111111 + 1+ 1 = 11 two

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4 ECE 4436ECE 5367 Concepts Logical equations CarryOut = (b.CarryIn) + (a.CarryIn) + (a.b) + (a.b.Carryin). –If the last term (a.b.carryin) is true, then one of the first three has to be true so we can leave out the last term CarryOut = (b.CarryIn) + (a.CarryIn) + (a.b). Sum = 1 when exactly one or all three inputs are 1.

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5 ECE 4436ECE 5367 Hardware for CarryOut signal Input combinations for which we have a carryout Inputs abCarryIn 011 101 110 111

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6 ECE 4436ECE 5367 1-bit logical Unit- &, + Use a mux to select between the two functions – arith. And logic addition. 1-bit selector since we have two operations to select from

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7 ECE 4436ECE 5367 1-bit ALU This ALU can perform the logical functions +, &, and the arithmetic fn. Of addition. A 2-bit selector is used to determine which operation is sent to the O/P.

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8 ECE 4436ECE 5367 32 bit ALU obtained from 1-bit ALUs.

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9 ECE 4436ECE 5367 Subtraction Same as addition. We negate the appropriate operand and then perform the addition. –2’s complement –1’s complement

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10 ECE 4436ECE 5367 Subtraction Include a mux which chooses btw b and b. We set the carry in signal to 1: –Remember 2s complement of a number a + b + 1 = a + (b + 1) = a – b *** b +1 = -b (2s complement)

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11 ECE 4436ECE 5367 Adder types Ripple carry adder Carry Lookahead adder Skip adder Carry Select adder

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12 ECE 4436ECE 5367 Ripple carry adder Created by linking directly the carries of 1-bit adders. –a single carry out of the LSB can ripple all the way through the adder. –this results in a carry out of the MSB Problem: The computation is time consuming.

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13 ECE 4436ECE 5367 Carry Lookahead Question: How quickly can we add two operands e.g 32 bit operands? The carry input depends on the operation in the previous 1-bit adder. Looking at the dependencies involved, the MSB of the sum has to wait for each of the preceding bit adders to sequentially evaluate. –PROBLEM : TOO SLOW

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14 ECE 4436ECE 5367 Analysis CarryIn2 is exactly = CarryOut1. = (b1.Carryin1) + (a1.Carryin1) + (b1.a1) Similarly CarryIn1 is exactly = CarryOut0. = (b0.Carryin0) + (a0.Carryin0) + (b0.a0) The purpose is to calculate ahead of time and bypass some adders thereby reducing calculation time.

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15 ECE 4436ECE 5367 Analysis Using ci = CarryIni: c2 = (b1.c1) + (a1.c1) + (a 1.b1). c1 = (b0.c0) + (a0.c0) + (a 0.b0). This expansion becomes more complex as we move to higher order bits.

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16 ECE 4436ECE 5367 Propagate and generate Attempt is to limit complexity as well as increasing the speed. Fast carry schemes attempt to do this. Carry Lookahead adder. –Uses levels of abstraction in its implementation. Propagate generate

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17 ECE 4436ECE 5367 Propagate & generate C i+1 = (bi.ci) + (ai.ci) + (ai.bi) = (ai.bi) + ci.(ai+bi) Using this formula: c2 = (ai.bi) + (ai+bi). ((a0.b0) + (a0+b0). c0) –generate = gi = (ai.bi). –propagate = pi = (ai+bi). ci+1 = gi + pi. ci gi pi

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18 ECE 4436ECE 5367 pi & gi contd. Assuming gi = 1: ci+1 = gi + pi. ci = 1 + pi. ci = 1 –The adder generates a CarryOut(ci+1) independent of the value of CarryIn(ci) if gi=1. Assuming gi = 0 & pi = 1: ci+1 = gi + pi. Ci = 0 + pi. ci = ci –The adder propagtes CarryIn (ci) to a CarryOut.

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19 ECE 4436ECE 5367 Logical expressions c1 = g0 + (p0.c0) c2 = g1 + (p1.g0) + (pi.p0.c0) c3 = g2 +(p2.g1) + (p2p1g0) + (p2.p1.p0.c0) c4 = g3 + (p3.g2) + (p3.p2.g1) + (p3.p2.p1.g0) + (p3.p2.p1.p0.c0) Cin propagates a carry if some earlier adder generates a carry and all intermediary adders propagate a carry.

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20 ECE 4436ECE 5367 2 nd level of abstraction. Faster => carry lookahead at a higher level. –4-bits adder, we need P0, P1, P2, P3 P0 = p3.p2.p1.p0 P1 = p3.p2.p1.p0 P2 = p3.p2.p1.p0 P3 = p3.p2.p1.p0 ******Super propagate (Pi) is only true if each of the bits will propagate a carry P = super propagate Propagate & generate at higher level

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21 ECE 4436ECE 5367 Example 1101 011000000001 0010 000101101011 P3, G3P2, G2P1, G1P0, G0 Remember, a carry is generated out of position i if gi = 1 or pi = 1 and there was a carryin From the previous position. pi = ai + bi gi = ai.bi

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22 ECE 4436ECE 5367 2 nd level of abstraction. Generate Gi. –Is there a carryout of the MSB of the 4-bit addition? A Gi of the MSB is true If gi is true for the MSB If a previous gi is true and all intermediate propagates are true. G0 = g3 + (p3.g2)+(p3.p2.g1)+(p3.p2.p1.g0) G1 = g7 + (p7.g6)+(p7.p6.g5)+(p7.p6.p5.g4) G2 = g11 + (p11.g10)+(p11.p10.g9)+(p11.p10.p9.g8) G3 = g15 + (p15.g14)+(p15.p14.g13)+(p15.p14.p13.g12)

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23 ECE 4436ECE 5367 Carryout The carries out of every fourth position is then given by… –C1 = G0 + (P0.c0) –C2 = G1 + (P1.G0) + (P1.P0.c0) –C3 = G2 + (P2.G1) + (P2.P1.G0) + (P2.P1.P0.c0) –C4 = G3 + (P3.G2) + (P3.P2.G1) + (P3.P2.P1.G0) + (P3.P2.P1.P0.c0)

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24 ECE 4436ECE 5367

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25 ECE 4436ECE 5367 Carry Lookhead Unit pre-calculated the carry bit

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26 ECE 4436ECE 5367 At bit 0

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27 ECE 4436ECE 5367 At bit 1

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28 ECE 4436ECE 5367 At bit 2

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29 ECE 4436ECE 5367 At bit 4

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30 ECE 4436ECE 5367 Overall

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31 ECE 4436ECE 5367 Total Delay

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32 ECE 4436ECE 5367 Extension for 64 bits ?

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33 ECE 4436ECE 5367 Basic unit of 4 bits

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34 ECE 4436ECE 5367 p and g inputs

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35 ECE 4436ECE 5367 Big block

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36 ECE 4436ECE 5367

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37 ECE 4436ECE 5367 Two-level

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38 ECE 4436ECE 5367 P and G ?

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39 ECE 4436ECE 5367 Generate the G

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40 ECE 4436ECE 5367 Propagate

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41 ECE 4436ECE 5367 Big picture

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42 ECE 4436ECE 5367 Multiple Level

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1 The ALU l ALU includes combinational logic. –Combinational logic a change in inputs directly causes a change in output, after a characteristic delay.

1 The ALU l ALU includes combinational logic. –Combinational logic a change in inputs directly causes a change in output, after a characteristic delay.

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