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R&D CIRCUITS Advanced Technology Products and Services Presented By: Sherri Sides & James Russell Presented By: Sherri Sides & James Russell.

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Presentation on theme: "R&D CIRCUITS Advanced Technology Products and Services Presented By: Sherri Sides & James Russell Presented By: Sherri Sides & James Russell."— Presentation transcript:

1 R&D CIRCUITS Advanced Technology Products and Services Presented By: Sherri Sides & James Russell Presented By: Sherri Sides & James Russell

2 R&D Circuits, Corporate Founded in 1965, almost 40 years of excellence...Founded in 1965, almost 40 years of excellence... 7 million per year in sales, 21,000 sq. feet of manufacturing7 million per year in sales, 21,000 sq. feet of manufacturing Privately Owned CompanyPrivately Owned Company Dedicated Reinvestment in the Company and TechnologyDedicated Reinvestment in the Company and Technology Design, Fabrication & AssemblyDesign, Fabrication & Assembly Two Locations, Edison NJ and Allentown, PATwo Locations, Edison NJ and Allentown, PA Focused Market Based Customer BaseFocused Market Based Customer Base

3 Fabrication Product Offerings Advanced Technology – Small VolumeAdvanced Technology – Small Volume A.T.E. IndustryA.T.E. Industry –Performance Boards DefenseDefense –Microwave / RF All MarketsAll Markets –HDI / Micro Via Medical /CommercialMedical /Commercial Rigid FlexRigid Flex

4 Basic Information Panel UtilizationPanel Utilization –12x18 (10x16) usable –18x24 (16x22) usable –20x26 (18x24) usable General Cost DriversGeneral Cost Drivers Technology & DeliveryTechnology & Delivery Holes (# & Sizes)Holes (# & Sizes) Core thicknessCore thickness High performance materialsHigh performance materials Lines and spacesLines and spaces Panel utilizationPanel utilization Hole to copper internalHole to copper internal A/R externalA/R external Surface finishSurface finish Material Types –High Temp FR4 –Rogers Full Series –Arlon –Taconic –Nelco –Getek –Polyimide –BT Expoxy –Cyanate Ester –Kapton Surface Finishes –Immersion Tin & Silver –HASL & OSP –Electrolytic Gold Hard –Electrolytic Gold Soft (wire bonding) –Solder-able wire-bondable Electrolytic Gold on the same surface –Immersion Gold

5 Certifications UL CertifiedUL Certified –(file #E47678 –.003 lines, 6 inch un- pierced area IPC MemberIPC Member –Active participant of technical committees ASQ Certified Quality Leadership –Quality Manager Certification –Quality Auditor Certification ISO Compliant –(meets applicable requirements of, NOT certified

6 Product Offerings, Cu filled vias 2:1 aspect ratio for reliable void free fill Panel, or Dot Shot Refer to Paper

7 Photomicrographs of cross-sections of successfully plated shut micro-vias from R&Ds research program. Micro-vias range in size from 5.5mils - 3mils in diameter in 1/2 mil increments. These micro-vias were laser drilled and RPP pattern plated at 10ASF. Aspect ratio = 1.96/1 Aspect ratio = 1.78/1 Aspect ratio = 1.61/1 Aspect ratio = 1.43/1 Aspect ratio = 1.25/1 Aspect ratio = 1.07/1

8 Product Offerings, Periodic reverse pulse plate Even distribution of Cu across panel Even distribution of Cu across hole wall.9 : 1, Plating aspect surface to Hole

9 Photomicrographs of cross-sections of a PTH that was RPP pattern plated at 10ASF for 180 minutes. Micrograph A shows the PTH at low magnification and micrographs B and C show the side wall and surface respectively at high magnification. Copper thickness measures 1.1 mils at the surface and 1.3 mils at the hole wall. In addition, image C shows the plating thickness as a function of 1/2 hour plating increments. Average plating rate measures 6.1x10 -3 mils/min at the surface and 7.1x10 -3 mils/min at the hole wall. R&D Circuits Proprietary

10 Photomicrographs of cross-sections of a PTH that was RPP panel plated at 15ASF for 180 minutes. Micrograph A shows the PTH at low magnification and micrographs B and C show the side wall and surface respectively at high magnification. Copper thickness measures 1.8 mils at the surface and 1.6 mils at the hole wall. Average plating rate measures 10.0x10 -3 mils/min at the surface and 8.9x10 -3 mils/min at the hole wall. R&D Circuits Proprietary

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12 Average plating rate surface 10 ASF, and ASF Average plating rate hole = ASF, and ASF R&D Circuits Proprietary

13 RPP plating scales well with current density Plating rates are slightly higher at the corners of the panel Pattern Plating yields a more consistent plating rate across the panel (10-15%pattern Vs %panel) Hole wall plating is uniform (+/- 5%) and is within standard deviation of measurements Pattern plating rates at the surface are 90-93%of those inside the hole RPP PLATING SUMMARY

14 9 Olsen Avenue Edison, NJ phone fax Sherri Sides Sales Manager 9 Olsen Avenue Edison, NJ phone fax Sherri Sides Sales Manager


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