Presentation on theme: "R&D CIRCUITS Advanced Technology Products and Services"— Presentation transcript:
1 R&D CIRCUITS Advanced Technology Products and Services Presented By:Sherri Sides & James Russell
2 R&D Circuits, Corporate Founded in 1965, almost 40 years of excellence...7 million per year in sales, 21,000 sq. feet of manufacturingPrivately Owned CompanyDedicated Reinvestment in the Company and TechnologyDesign, Fabrication & AssemblyTwo Locations, Edison NJ and Allentown, PAFocused Market Based Customer Base
4 Basic Information General Cost Drivers Material Types High Temp FR4Rogers Full SeriesArlonTaconicNelcoGetekPolyimideBT ExpoxyCyanate EsterKaptonSurface FinishesImmersion Tin & SilverHASL & OSPElectrolytic Gold HardElectrolytic Gold Soft (wire bonding)Solder-able wire-bondable Electrolytic Gold on the same surfaceImmersion GoldPanel Utilization12x18 (10x16) usable18x24 (16x22) usable20x26 (18x24) usableGeneral Cost DriversTechnology & DeliveryHoles (# & Sizes)Core thicknessHigh performance materialsLines and spacesPanel utilizationHole to copper internalA/R externalSurface finish
5 Certifications UL Certified IPC Member (file #E47678.003 lines, 6 inch un-pierced areaIPC MemberActive participant of technical committee’sASQ Certified Quality LeadershipQuality Manager CertificationQuality Auditor CertificationISO Compliant(meets applicable requirements of, NOT certified
6 Product Offerings, Cu filled vias 2:1 aspect ratiofor reliable voidfree fillPanel,or Dot ShotRefer to Paper
7 Aspect ratio = 1.96/1Aspect ratio = 1.78/1Aspect ratio = 1.61/1Aspect ratio = 1.07/1Aspect ratio = 1.43/1Aspect ratio = 1.25/1Photomicrographs of cross-sections of successfully plated shut micro-vias from R&D’s research program. Micro-vias range in size from 5.5mils - 3mils in diameter in 1/2 mil increments. These micro-vias were laser drilled and RPP pattern plated at 10ASF.
8 Product Offerings, Periodic reverse pulse plate Even distribution of Cu across panelEven distribution of Cuacross hole wall.9 : 1, Plating aspectsurface to Hole
9 R&D Circuits Proprietary Photomicrographs of cross-sections of a PTH that was RPP pattern plated at 10ASF for 180 minutes. Micrograph A shows the PTH at low magnification and micrographs B and C show the side wall and surface respectively at high magnification. Copper thickness measures 1.1 mils at the surface and 1.3 mils at the hole wall. In addition, image C shows the plating thickness as a function of 1/2 hour plating increments. Average plating rate measures 6.1x10-3mils/min at the surface and 7.1x10-3mils/min at the hole wall.R&D Circuits Proprietary
10 R&D Circuits Proprietary Photomicrographs of cross-sections of a PTH that was RPP panel plated at 15ASF for 180 minutes. Micrograph A shows the PTH at low magnification and micrographs B and C show the side wall and surface respectively at high magnification. Copper thickness measures 1.8 mils at the surface and 1.6 mils at the hole wall. Average plating rate measures 10.0x10-3mils/min at the surface and 8.9x10-3mils/min at the hole wall.R&D Circuits Proprietary
12 R&D Circuits Proprietary Average plating rate surface 10 ASF, and ASFAverage plating rate hole = ASF, and ASFR&D Circuits Proprietary
13 RPP PLATING SUMMARY RPP plating scales well with current density Plating rates are slightly higher at the corners of the panelPattern Plating yields a more consistent plating rate across the panel (10-15%pattern Vs %panel)Hole wall plating is uniform (+/- 5%) and is within standard deviation of measurementsPattern plating rates at the surface are 90-93%of those inside the hole
Your consent to our cookies if you continue to use this website.