1. 1 New build-up technique with copper bump AGP Process

2. 2 AGP Build-up PCB

3. AGP Build-up PCB Section Figure Multi-via Structures

4. 4 Cross sectional view of AGP Photo. 1+4+1 build-up PWB using AGP To use copper bump as a connection between layers

5. 5 Cross sectional view of AGP Photo. 2+2+2 build-up PWB using AGP Photo. 3+4+3 build-up PWB using AGP Copper bump L1 alnd L2 land

6. 6 Concepts of developing AGP 1. Possible to reduce land size 2. Possible to stack vias 3. Possible to form bumps of different diameters in a one-step batch process 4. Improvement of reliability of electrical connection

7. 7 Benefits of AGP 1. Possible to reduce diameter of via AGP bump is formed by etching method. It is possible to form micro-bumps with a diameter 50micron. 2. Possible to stack vias easily AGP enables very flat land surface without via-filling. It is suitable process for multi-layer build-up structure.

8. 8 Benefits of AGP 3. High reliability of connecting Land to via joining is achieved by copper plating. This enables high reliability of electrical connection and high land- pull strength. 4. Possible to form bumps of different diameters By selecting the size of the etching mask, the bump of a different diameter can exist together. Larger bump can be used for the part where high heat conductivity or low electric resistance are necessary.

9. 9 Benefits of AGP 5. Low surface roughness of outer copper Outer layer is formed by panel-plating. It has sufficient peel strength even if there is no anchor effect. This smooth side contributes to the high frequency characteristic.

10. 10 Structure that AGP enables 1. Multi build-up structure with stacking via 2. Flip chip pad with micro via connection High density PWBs can be achieved by AGP. It is suitable for MCM.

11. 11 Structure that AGP enables 3. Land-less pattern Via and line can be connected directly without forming land. It will bring drastic higher wiring density. Upper view Because the bump layer is formed by the etching, It is possible to process it to various shape. That enables frame as illustrated, it brings rigidly Improvement. It is also as possible to build the coaxial cable Structure into. 4. Rigidly improvement by copper frame 3D view

12. 12 Structure that AGP enables 5. Heat management by forming thermal via Improvement of heat dissipation effect Forming chip size heat sink By AGP process Plugged via by using Conductive paste BGA/CSP

13. 13 Schematic illustration of AGP process Core board Copper plated on core board Forming bumps by etching Forming dielectric layer(Liquid epoxy) Copper plating as outer layer

14. 14 AGP Process AGP Process Inner Layer Pattern

15. 15 AGP Process Copper Plating

16. 16 AGP Process Bump Masking

17. 17 AGP Process Bump Etching

18. 18 AGP Process Dielectric layer

19. 19 AGP Process External Layer Pattern

20. 20 Manufacturing Spec Minimum land size of outer layer 100 m Minimum size of top of via 50 m Dielectric thickness of AGP layer 30~60 m Dielectric consists of epoxy resin Not including glass-cross Minimum size of bottom of via 75 m Minimum land size of inner layer 150 m

21. 21 Result of durability tests TestsConditionsStandardsResultsJudgments Humidity bias test (Cyclic) IPC-SM-840C Class T Insulation resistance 1x10 8 or more Peel strength of conductive 600g/cm or more 6x10 11 1.0kg/cm OK Humidity bias test (Steady state) 40 /90%R.H./50V 240hrs 85 /85%R.H./30V 100hrs Insulation resistance 1x10 8 or more Peel strength of conductive 600g/cm or more Insulation resistance 1x10 8 or more Peel strength of conductive 600g/cm or more 2x10 11 1.0kg/cm 2x10 11 1.0kg/cm OK PCT 121 /2atm /100%R.H./96h 130 /2.3atm /85%R.H./5.5V/168h Insulation resistance 1x10 8 or more 3x10 11 OK Dielectric strengthApplying 500V in 5sec and keeping 1min No dielectric breakdown 2x10 12 OK

22. 22 Result of durability tests TestsConditionsStandardsResultsJudgments Thermal shock test (Vapor phase) -65 /30min 125 /30min 1000cycles Change in resistance 10% or less 0.5%OK Thermal shock test (Hot oil) 260 /5sec 20 /15sec 300cycles Change in resistance 10% or less 2.0%OK Solder bath test 260 /10sec 3times Change in resistance 10% or less 1.0%OK High temperature storage 125 /100hrs Change in resistance 10% or less Insulation resistance 1x10 8 or more Peel strength of Conductive 600g/cm or more 0.5% 1x10 10 1.0kg/cm OK