Unit 1 – Counters and Registers Mr. Grimming

Introduction FFs and logic gates are combined to form various counters and registers. Unit Goals Goals: Understand counter principles Describe various counter circuits and IC counters. Describe IC registers and shift registers Troubleshoot counters and registers

Asynchronous (Ripple) Counters

Schematics are normally drawn from left to right, but counters will be drawn from right to left so that the MSB and LSB appear in the appropriate positions. MOD number is equal to the number of states that the counter goes through before recycling. Adding FFs will increase the MOD number. Frequency division – each FF will have an output frequency of ½ the input. The output frequency of the last FF of any counter will be the clock frequency divided by the MOD of the counter.

Propagation Delay in Ripple Counters Ripple counters are simple, but the cumulative propagation delay can cause problems at high frequencies. For proper operation the following apply: T clock  N x t pd F max =1/(N x t pd )

Counters with MOD Number <2 N The MOD of a counter can be changed by designing the counter to normal parts of the counting sequence. When outputs B and C are high the counter will be reset.

Counters with MOD Number <2 N Notice the “glitch” in the waveform when the count reaches 6. This represents the brief time required to reset the counter.

Synchronous (Parallel) Counters All FFs are triggered by CPs simultaneously Synchronous counters can operate at much higher frequencies than asynchronous counters. Each FF has J and K inputs connected so they are HIGH only when the outputs of all lower-order FFs are HIGH. The total propagation delay will be the same for any number of FFs.

Synchronous (Parallel) Counters MOD-6 counter produced by clearing a MOD-8 counter when a count of six (110) occurs.

Counters with MOD Number < 2 N Displaying counter states – The arrangement shown results in an LED on when the output is high.

Counters with MOD Number < 2 N Changing the MOD number. Find the smallest MOD required so that 2 N is less than or equal to the requirement. Connect a NAND gate to the asynchronous CLEAR inputs of all FFs. Determine which FFs are HIGH at the desired count and connect the outputs of these FFs to the NAND gate inputs.

Counters with MOD Number < 2 N

Decade counters/BCD counters A decade counter is any counter with 10 distinct states, regardless of the sequence. Any MOD-10 counter is a decade counter. A BCD counter is a decade counter that counts from binary 0000 to Decade counters are widely used for counting events and displaying results in decimal form.

Synchronous Down Counters The synchronous counter can be converted to a down counter by using the inverted FF outputs to drive the JK inputs.

Synchronous Up/Down Counters A synchronous counter can be made an up/down counter by connecting as illustrated

Presettable Counters A presettable counter can be set to any desired starting point either asynchronously or synchronously. The preset operation is also called parallel loading the counter.

Presettable Counter