Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Properties of Complementary CMOS Gates.

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Presentation transcript:

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Properties of Complementary CMOS Gates

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Transistor Sizing

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Propagation Delay Analysis - The Switch Model

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction What is the Value of R on ?

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Numerical Examples of Resistances for 1.2  m CMOS

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Analysis of Propagation Delay

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Design for Worst Case

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Influence of Fan-In and Fan-Out on Delay

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction t p as a function of Fan-In

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Fast Complex Gate - Design Techniques

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Fast Complex Gate - Design Techniques (2)

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Fast Complex Gate - Design Techniques (3)

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Fast Complex Gate - Design Techniques (4)

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Example: Full Adder

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction A Revised Adder Circuit

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Properties of Complementary CMOS Gates

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Transistor Sizing

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Propagation Delay Analysis - The Switch Model

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction What is the Value of R on ?

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Numerical Examples of Resistances for 1.2  m CMOS

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Analysis of Propagation Delay

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Design for Worst Case

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Influence of Fan-In and Fan-Out on Delay

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction t p as a function of Fan-In

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Fast Complex Gate - Design Techniques

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Fast Complex Gate - Design Techniques (2)

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Fast Complex Gate - Design Techniques (3)

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Fast Complex Gate - Design Techniques (4)

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Example: Full Adder

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction A Revised Adder Circuit

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Ratioed Logic

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Ratioed Logic

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Active Loads

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Load Lines of Ratioed Gates

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Pseudo-NMOS

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Psudo-NMOS –N+1 transistors (small) One pull-up P transistor –Ratio based logic: Sizes Matter –Sensitive to power supply –Static power dissipation: Slow and/or power hungry

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Pseudo-NMOS NAND Gate V DD GND

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Improved Loads

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Improved Loads (2)

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Example

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Pass-Transistor Logic

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction NMOS-only switch

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Solution 1: Transmission Gate

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Pass Gate Structures l Bad –Can be slow –Complementary layout is hard to do well –Well plugs are a problem (no vdd/gnd) –Non-standard minimization techniques –True and complement inputs typically needed. l Good –Can be very small – Complementary layout not always used –Non-Boolean logic functions –True switching functions supported –Storage integrated into logic structures

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Pass Logic l NMOS style - accept weak "1"'s –restore good 1's with an inverter l CMOS style -- messy to lay out –wells and well plugs l Precharged / feedback / pseudo-pullup

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Resistance of Transmission Gate

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Pass-Transistor Based Multiplexer GND V DD In 1 In 2 SS S S

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Transmission Gate XOR

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Delay in Transmission Gate Networks

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Elmore Delay (Chapter 8)

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Delay Optimization

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Transmission Gate Full Adder

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction (2) NMOS Only Logic: Level Restoring Transistor

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Level Restoring Transistor

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Solution 3: Single Transistor Pass Gate with V T =0

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Complimentary Pass Transistor Logic

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Pass Gate Logic

Introduction to VLSI Design© Steven P. Levitan 1998 Introduction 4 Input NAND in CPL