SJTU 2006 SPADE Manual Ma Diming

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Presentation transcript:

SJTU 2006 SPADE Manual Ma Diming

SJTU 2006 SPADE Introduction Design Features –Schematic Editor (Cadence Virtuoso, or SED) –Simulator (Synopsys HSPICE) –2D/3D GUI for results representation –Hierarchical design support –Parameters variation consideration –Analog design target consideration (PM, ro, A, etc.) –Symbolic & Accurate –Matlab like function representation –Specified model simulation –… … SPADE is short for Simulation Program for Analog Design Education thanks to his father, Prof. Shi.

SJTU 2006 Analog Design Flow Circuit Descriptions Simulation Results & Analysis Meet Requirements? Re- Design No Yes, Design Done Schematic Descriptions Netlist Descriptions Numerical, HSpice, Spectrum Symbolic, GRASS Waveforms, Curves, Avanwaves Direct Optimal Results, W/L A, PM, Z-P, SNR, BW, SR, … Ideal : Requirements + Design Solution => Results

SJTU 2006 SPADE Design Flow GRASS Role NetlistDC SimModel Extraction Graph ReductionH(S)2D/3D Representations SPADE Flow Circuits

SJTU 2006 SPADE Framework A HSpice Like Interface FormulaNetlist Schematic Editor Cadence ICFB SimulateConfigureHelp & About Menu SPADE Points  Flow is like: Formula / ICFB->Netlist->Configure->Simulate  2D/3D, Parallel, etc. options decided by user to show the results

SJTU 2006 SPADE Operations Launch Cadence ICFB

SJTU 2006 SPADE Operations Launch GEdit for Text Operations

SJTU 2006 SPADE Operations Launch GUI for Configure Options Setting

SJTU 2006 SPADE Operations Start GRASS Based Simulation

SJTU 2006 SPADE Operations Help & About Documentation

SJTU 2006 Current SPADE Current SPADE Features –Support Cadence & Synopsys mixed tool co-work –Support bandwidth and phase margin based design target oriented design considering parameter variations –Support multi-dimensional result representation –Only need DC simulation by HSPICE, no transient simulation needed Current SPADE Defects –Not support sub-circuit and hierarchical design –Not support “+” mark or other complicated mark in HSPICE format –Not support format editing and black-box model creation –Not support other design targets except bandwidth and phase margin –Not support large circuit, say over 23 mosfet transistors –Not support IO definition and other kind of operations by schematic editor –Not support bipolar Most of the Defects will be turned into Features by your midterm project If you ARE Interested, we can do it together, WELCOME to join to the SPADE develop project

SJTU 2006 SPADE Design Steps 1.Login to the server for SPADE Binary 2.Open a new terminal and enter into the folder you downloaded the binary 3.Type “csh” or “source ~/.cshrc” to configure the environment variables 4.Make sure the files under script folder are executable or type “chmod +x script/*” command to make it executable 5.Make sure your time by “date” command updated with the server 6.Launch the SPADE tool by command “./SPADE” 7.Launch Cadence ICFB by clicking the “Schematic” Button 8.Create your own circuit by Virtuoso following your TA’s instructions 9.Generate the HSPICE formatted netlist 1.Set the simulator as HSPICE-D 2.Create the netlist and save 10.Launch GEdit to modify the created netlist

SJTU 2006 SPADE Design Steps 11.Modify the netlist as followings 1.Add comment in the format “*IODEF: VIN [InputNode] [InputNode AC Amp] VOUT [OutputNode]” after the 1 st line, eg. “*IODEF: VIN 2 1 VOUT 4” 2.Add library statement, eg. “.lib ‘examples/lib/cmos25.lib' tt” at the beginning of the file 3.Add simulation statement “.op” and “.options list node post=2 probe” right above the “.end” statement, statement “.print ac VDB([OutputNode]) VP([OutputNode])” is strongly suggested to be added too 4.Comment “.global” statement, replace the node nonsense to make it meaningful, eg. replace “_gnet*” to “0” or “vdd” in the whole file 5.Comment “.TEMP” statement and statements with “+” mark 6.Make sure the following things are as required 1.No mosfet named “m0” exist, otherwise rename it to a index positive 2.VDD and GND node is named as “vdd” or “vdd!” and “gnd” or “0” 3.NMOS and PMOS model is within the library file, say “nmos” for “cmos25.lib” and “nch3” for “log018.l” 4.The simulation level is within the library file, say “tt” for “cmos25.lib” and “tt_3v” for “log018.l” 7.Save the circuit file

SJTU 2006 SPADE Design Steps 12.Save the modified netlist and configure the environment variables 1.The view option will decide 2D, 3D or 2D and 3D result representation by GRASS 2.The library and model option currently is useless but still suggested to be set 3.All the other options must be set before you go to the simulation stage 4.“Node name” and “Display name” can be the same for each parameter 5.Save the configure settings to a file 13.Run the simulation by choosing the right configure file 1.If error found during the simulation stage, check the error messages or the popped error file information and do as the information indicates 14.Finish the 2D & 3D results analysis

SJTU 2006 SPADE Design Steps 15.2D Operations 1.Parameters might be too many for you, just choose the right one 2.All the buttons and menus are not responsible except the “export” one 3.2D Results is currently with only Amp and PM properties 16.3D Operations 1.3 windows popped up, surface window (Target-P1-P2), Contour Window (the crossed surface curve with the 3D distributions), Status Window (the related data value) 2.You can move the 3D curve by “up”, “down”, “left” and “right”; “page up”, “page down”, “home” and “end” key of the keyboard 3.Drag the surface to cross the 3D curve by your left mouse button 4.Right click your mouse in the surface window to switch between different target of analog design 5.Other hot key bindings, please refer to the next page

SJTU 2006 SPADE Design Steps 17.3D curve hot key bindings (Surface Window) 1.“I” – reset the reference square plane 2.“i” – refresh the surface window 3.“G”/”g” – refresh the surface window 4.“ ” – refresh 5.“ ” – exit 6.“l” – save current contour line as lower bound 7.“L” – show lower bound info 8.“u” – save current contour line as upper bound 9.“U” – show upper bound info 10. “a” – set previous contour line save or not 11. “p” – save contour line as a phase margin copy 12. “P” – save contour line as a d(phase margin)/dx copy 13. “b” – save contour line as a band width copy 14. “B” – save contour line as a d(band width)/dx copy

SJTU 2006 SPADE Design Steps 18.3D curve hot key bindings (Contour Window) 1.“c” – switch between display all saved contour lines as constraints or not 2.“C” – clear all saved contour lines 3.“d” – switch between design center point display or not 4.“m” – switch between auto-point absorption or not

SJTU 2006 SPADE Manual Thank You Any question, please feel free to contact me by